coreboot/src/southbridge
Ed Swierk 83a965d2ef Implement GPIO configuration routines for the Intel 3100 southbridge,
allowing you to specify per-mainboard GPIO settings.

Signed-off-by: Ed Swierk <eswierk@arastra.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3290 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-05-07 21:57:12 +00:00
..
amd cs5536 IDE PWB flag was not getting set since it is 1<<14 and it was only doing a 2008-05-06 16:56:47 +00:00
broadcom Rename almost all occurences of LinuxBIOS to coreboot. 2008-01-18 15:08:58 +00:00
intel Implement GPIO configuration routines for the Intel 3100 southbridge, 2008-05-07 21:57:12 +00:00
nvidia This patch fixes the 3 broken sata ports on the Tyan s2891 (primary port on 2008-04-23 00:40:39 +00:00
ricoh/rl5c476 Rename almost all occurences of LinuxBIOS to coreboot. 2008-01-18 15:08:58 +00:00
sis/sis966 Please bear with me - another rename checkin. This qualifies as trivial, no 2008-01-18 10:35:56 +00:00
via Following patch adds K8M890 support. It initializes the AGP and graphics UMA. 2008-03-20 21:19:50 +00:00
winbond/w83c553 Updating FSF address in the code. 2005-10-05 18:17:45 +00:00