e7a39c6953
mb() is used in src/arch/riscv/ and src/mainboard/emulation/*-riscv/. It is currently provided by atomic.h, but I think it fits better into barrier.h. The "fence" instruction represents a full memory fence, as opposed to variants such as "fence r, rw" which represent a partial fence. An operating system might want to use precisely the right fence, but coreboot doesn't need this level of performance at the cost of simplicity. BUG=None BRANCH=None TEST=None Change-Id: I415c642941471bc3bf99bfeeb235cfaef7e247fe Signed-off-by: Jonathan Neuschfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/15830 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: https://chromium-review.googlesource.com/367373 Commit-Ready: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Furquan Shaikh <furquan@chromium.org> |
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| qemu-armv7 | ||
| qemu-i440fx | ||
| qemu-power8 | ||
| qemu-q35 | ||
| qemu-riscv | ||
| spike-riscv | ||
| Kconfig | ||
| Kconfig.name | ||