Michał Żygowski 940d1d0868 soc/intel/cannonlake: Let coreboot lock MSR_IA32_DEBUG_INTERFACE ... Intel TXT requires the debug interface to be disabled. There is no way to program the MSR_IA32_DEBUG_INTERFACE using FSP as needed, so let coreboot handle it. TEST=Boot Linux with tboot on Protectli VP4670 with Intel TXT enabled Change-Id: I7ed4382bbe68f03e8eca151245c13928609f434f Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83730 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>		2025-03-10 15:19:26 +00:00
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amd	include/cpu/amd/mtrr: rename TOP_MEM(2) and remove workaround	2024-08-15 21:42:32 +00:00
intel	soc/intel/cannonlake: Let coreboot lock MSR_IA32_DEBUG_INTERFACE	2025-03-10 15:19:26 +00:00
power	src/cpu/power9: move part of scom.h to scom.c	2023-04-18 13:05:56 +00:00
x86	cpu/x86/topology: Simplify CPU topology initialization	2024-12-17 17:24:15 +00:00
cpu.h	x86: Separate CPU and SoC physical address size	2023-12-22 12:26:59 +00:00