Meera Ravindranath 5e80bcfaea mb/google/brya: Select SOC_INTEL_COMMON_UFS_SUPPORT for Nissa ... BUG=b:238262674 TEST=Build and check ufs.c file gets compiled for Nissa boards Signed-off-by: Meera Ravindranath <meera.ravindranath@intel.com> Change-Id: Idc5ad922b97bd1e65e5023f9126c43e42cfc38a5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/66064 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Reka Norman <rekanorman@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2022-08-08 18:08:16 +00:00
..
acpi
arch	arch/x86/acpi: Replace Store() with ASL 2.0 syntax	2022-07-30 00:11:58 +00:00
commonlib	commonlib/timestamp_serialized: Add comment explaining "ignore for x86"	2022-08-07 19:28:09 +00:00
console
cpu	arch/x86: Fix MAX_CPUS check proper for late X2APIC config	2022-07-25 10:06:18 +00:00
device	pciexp_device: Handle unsupported requests in pciexp_get_ext_cap_offset()	2022-08-07 19:49:35 +00:00
drivers	payloads/tianocore: Remove the option for CorebootPayloadPkg	2022-08-07 19:48:17 +00:00
ec	ec/system76/ec: Provide charging thresholds by default	2022-07-16 22:48:06 +00:00
include	pci_device: Add a function to find PCI capability ID recursively	2022-08-07 19:41:38 +00:00
lib	lib/program_loaders.c: Mark run_ramstage with __noreturn	2022-07-14 23:10:17 +00:00
mainboard	mb/google/brya: Select SOC_INTEL_COMMON_UFS_SUPPORT for Nissa	2022-08-08 18:08:16 +00:00
northbridge	nb/amd: Fix some white spaces issues	2022-07-17 21:57:31 +00:00
security	security/vboot: Simplify image signing	2022-07-30 18:29:25 +00:00
soc	soc/amd/sabrina: Rename PSP SPL default	2022-08-08 16:59:30 +00:00
southbridge	sb/intel/bd82x6x/acpi: Replace LEqual(a,b) with ASL 2.0 syntax	2022-07-29 10:16:25 +00:00
superio	superio/ite/common/early_serial.c: ite_kill_watchdog: set timeout to 0	2022-08-07 19:54:43 +00:00
vendorcode	vc/intel/fsp: Update ADL N FSP headers from v3222.03 to v3267.01	2022-08-07 19:39:43 +00:00
Kconfig