DDR5 uses a Serial Presence Detect (SPD) with hub function (SPD5 hub device) to store the SPD data. The SPD5 hub has 1024 bytes of EEPROM (`CONFIG_DIMM_SPD_SIZE=1024`). Ref: DDR5 SDRAM spec, JESD79-5C.01 Change-Id: Ic5e6c58f255bef86b68ce90a4f853bf4e7c7ccfe Co-authored-by: Meera Ravindranath <meera.ravindranath@intel.com> Signed-off-by: Jeremy Soller <jeremy@system76.com> Signed-off-by: Tim Crawford <tcrawford@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52731 Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
58 lines
1.7 KiB
C
58 lines
1.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef SPD_BIN_H
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#define SPD_BIN_H
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#include <stdint.h>
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#include <commonlib/region.h>
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#define SPD_PAGE_0 (0x6C >> 1)
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#define SPD_PAGE_1 (0x6E >> 1)
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#define SPD_DENSITY_BANKS 4
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#define SPD_ADDRESSING 5
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#define SPD_SN_LEN 4
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#define DDR3_ORGANIZATION 7
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#define DDR3_BUS_DEV_WIDTH 8
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#define DDR4_ORGANIZATION 12
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#define DDR4_BUS_DEV_WIDTH 13
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#define DDR4_SPD_SN_OFF 325
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#define MAX_SPD_PAGE_SIZE_SPD5 128
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#define MAX_SPD_SIZE (256 * 4)
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#define SPD_HUB_MEMREG(addr) ((u8)(0x80 | (addr)))
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#define SPD5_MR11 0x0B
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#define SPD5_MR0 0x00
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#define SPD5_MEMREG_REG(addr) ((u8)((~0x80) & (addr)))
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#define SPD5_MR0_SPD5_HUB_DEV 0x51
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struct spd_offset_table {
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u16 start; /* Offset 0 */
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u16 end; /* Offset 2 */
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};
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struct spd_block {
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u8 addr_map[CONFIG_DIMM_MAX]; /* 7 bit I2C addresses */
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u8 *spd_array[CONFIG_DIMM_MAX];
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/* Length of each dimm */
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u16 len;
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};
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void print_spd_info(uint8_t spd[]);
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uintptr_t spd_cbfs_map(u8 spd_index);
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void dump_spd_info(struct spd_block *blk);
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void get_spd_smbus(struct spd_block *blk);
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int spd_read_byte(u8 slave_addr, u8 bus_addr);
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int spd_read_word(u8 slave_addr, u8 bus_addr);
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void spd_write_byte(u8 slave_addr, u8 bus_addr, u8 value);
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/*
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* get_spd_sn returns the SODIMM serial number. It only supports DDR3 and DDR4.
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* return CB_SUCCESS, sn is the serial number and sn=0xffffffff if the dimm is not present.
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* return CB_ERR, if dram_type is not supported or addr is a zero.
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*/
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enum cb_err get_spd_sn(u8 addr, u32 *sn);
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/* expects SPD size to be 128 bytes, reads from "spd.bin" in CBFS and
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verifies the checksum. Only available if CONFIG_DIMM_SPD_SIZE == 128. */
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int read_ddr3_spd_from_cbfs(u8 *buf, int idx);
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#endif
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