f5b993de4f
According to datasheet, the enable bit for direct I/O access to GPIO lines is at CR30[3] of LDN 8, not [0] as currently coded. Change-Id: Id2f997aebc36a2fcaa8c3763f324d3b288f785d2 Signed-off-by: Keith Hui <buurin@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81926 Reviewed-by: Eric Lai <ericllai@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> |
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