Kenji Chen a874a7c26f PCIe: Revise L1 Sub-State support ... BRANCH=None BUG=None TEST=Confirmed build pass only Signed-off-by: Kenji Chen <kenji.chen@intel.com> Change-Id: Ic0e845436614e63ad5ace7fb74400f7ea295571c Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: d3670b92e40d8757a48add6116a0edcec18074d8 Original-Change-Id: I5e029b0f82a771149d4c6127e30b9062e8eaba89 Original-Reviewed-on: https://chromium-review.googlesource.com/244514 Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Original-Commit-Queue: Kenji Chen <kenji.chen@intel.com> Original-Tested-by: Kenji Chen <kenji.chen@intel.com> Reviewed-on: http://review.coreboot.org/8833 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>		2015-03-23 13:11:18 +01:00
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arch	mips: no need in architecture specific implementation of do_printk	2015-03-21 16:57:04 +01:00
console	console/Kconfig: Enable CBMEM console by default	2015-03-10 23:42:22 +01:00
cpu	imgtec/danube: Add support for ImgTec Danube SoC	2015-03-21 16:57:08 +01:00
device	PCIe: Revise L1 Sub-State support	2015-03-23 13:11:18 +01:00
drivers	verstage should include the CBFS SPI wrapper, when configured	2015-03-20 16:04:52 +01:00
ec	chromeec: use stopwatch API	2015-03-21 17:00:26 +01:00
include	PCIe: Add L1 Sub-State support.	2015-03-23 13:11:15 +01:00
lib	ramstage: remove rela_time use	2015-03-21 17:00:34 +01:00
mainboard	mainboards/amd/fam10: Add romstage timestamps	2015-03-21 08:06:44 +01:00
northbridge	cpu/amd/model_10xxx: Add support for early cbmem	2015-03-19 08:28:43 +01:00
soc	tegra132: convert to stopwatch API	2015-03-21 17:01:12 +01:00
southbridge	CBMEM: Add LATE_CBMEM_INIT guards	2015-03-19 06:17:07 +01:00
superio	superio: ite8772f: Exit extemp busy state	2015-03-21 08:44:28 +01:00
vendorcode	loaders: add program_loading.h header file	2015-03-20 19:25:29 +01:00
Kconfig	arch/mips: Add base MIPS architecture support	2015-03-21 16:56:59 +01:00