e46a977541
Currently, the LTE pins are enabled in gpio.c, then disabled in fw_config.c if LTE is not present. However, since there's a short delay between mainboard_init() and fw_config_handle(), this means that when LTE is not present GPP_H19 (SOC_I2C_SUB_INT_ODL, used for the SAR sensor) will be floating for a short period of time. Rework the GPIO config so that the LTE pins are disabled in the baseboard, then enabled in fw_config.c for variants using LTE. However, this doesn't work for WWAN_EN and WWAN_RST_L since they need to be enabled in bootblock. So these are instead enabled in the variant gpio.c, then disabled in fw_config.c if LTE is not present. BUG=None TEST=LTE still works on nivviks Change-Id: I9d8cbdff5a0dc9bdee87ee0971bc170409d925a2 Signed-off-by: Reka Norman <rekanorman@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/64270 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-by: Kangheui Won <khwon@chromium.org> |
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| .. | ||
| acpi | ||
| arch | ||
| commonlib | ||
| console | ||
| cpu | ||
| device | ||
| drivers | ||
| ec | ||
| include | ||
| lib | ||
| mainboard | ||
| northbridge | ||
| security | ||
| soc | ||
| southbridge | ||
| superio | ||
| vendorcode | ||
| Kconfig | ||