Aaron Durbin e35e695377 soc/intel/common/lpss_i2c: correct bus speed error ... The wrong value was used for reporting an error when a requested bus speed was made that isn't supported. Use the requested value. Change-Id: I6c92ede3d95590d95a42b40422bab88ea9ae72a1 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/17474 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>		2016-11-19 16:56:23 +01:00
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broadcom/cygnus	soc/broadcom/cygnus: Update DDR Kconfig	2016-11-17 17:57:09 +01:00
dmp/vortex86ex	src/soc: Capitalize CPU, ACPI, RAM and ROM	2016-07-31 19:27:53 +02:00
imgtec/pistachio	drivers/uart: Use uart_platform_refclk for all UART models	2016-05-09 18:45:44 +02:00
intel	soc/intel/common/lpss_i2c: correct bus speed error	2016-11-19 16:56:23 +01:00
lowrisc/lowrisc	riscv: add the lowrisc System On Chip support	2016-10-25 22:31:06 +02:00
marvell	marvell/mvmap2315: Compose BOOTBLOCK region	2016-10-21 19:42:23 +02:00
mediatek/mt8173	src/soc: Add required space before opening parenthesis '('	2016-08-31 20:09:42 +02:00
nvidia	soc/nvidia/tegra210: Remove CONSOLE_SERIAL_TEGRA210_UART_CHOICES	2016-11-14 18:10:57 +01:00
qualcomm	soc/qualcomm/ipq40xx: Fix GPIO pull up config.	2016-10-07 17:55:19 +02:00
rdc/r8610
rockchip	rockchip/rk3399: Change 933 DPLL to low jitter rate	2016-11-17 17:59:22 +01:00
samsung	src/soc: Capitalize CPU, ACPI, RAM and ROM	2016-07-31 19:27:53 +02:00
ucb/riscv	soc/ucb/riscv: select BOOTBLOCK_CONSOLE	2016-08-15 18:24:42 +02:00