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Carlos López e35175bb38 Update vboot submodule to upstream main
Updating from commit id f1f70f46dc54:
2024-07-31 14:57:49 +0000 - (2lib: Add gbb flag to enforce CSE sync)

to commit id 3f94e2c7ed58:
2024-12-18 16:14:28 -0800 - (Makefile: Allow cross-compilation for RISC-V)

This brings in 49 new commits:
3f94e2c7ed58 Makefile: Allow cross-compilation for RISC-V
44c19d1893aa futility/updater: Remove obsolete write protection help URL
d1813a4666d7 futility: Add shell-parseable manifest format
2935820d404e vboot.rc: Mount tmpfs with SELinux context
c57a588f8029 crossystem: Change cros_debug to rely on mainfw_type, not devsw_boot
3ff18c08ee7d Android.bp: Remove host_supported for crossystem
dfd2b7c7404e Android.bp: Remove unused static libraries for firmware builds
f8eb37d14935 Makefile: Drop vboot_fw.a dependency for futility
0d49b8fdf002 recovery_kernel: add signing type recovery_kernel
1f7ca823da09 gpt_misc: Return uint64_t from GptGetEntrySize functions
3662103165a3 Reland "host/lib/flashrom: Use flashrom provided in PATH"
26e8011fd517 Add configurable temporary directory path
a0f83f9f3a0c futility: Drop futility execution logging to /tmp/futility.log
862e250e672c crossystem: Make crossystem vendor_available
3246e484ca08 futility: updater: Increase try count from 11 to 13
2ab8888bddac make_dev_ssd: add upstream cmdline flag for ptracers
3c2ef9400c05 Update Rust OWNERS file to include libchromeos-rs/OWNERS
c5af1fd8490d make_dev_ssd.sh: avoid page cache aliasing
38f9c255d31d Revert "host/lib/flashrom: Use flashrom provided in PATH"
7d4b23f9a054 futility: updater: Revise the test script
8494502d9f0b futility: updater: Support emulation in the output mode
54be900d8e1a futility: updater: Handle flashrom read failure in load_system_firmware
2a78755815d6 futility: updater: Drop `signature_id` from implementation
90f591700475 futility: updater: Add a new config 'output_only'
94d884d8a5bb futility: updater: Deprecate `--signature_id` by `--model`
24fd715c90e8 host/lib/flashrom: Use flashrom provided in PATH
ac49f1ca939b Build thin archives
640fe19f5f92 host/lib/crossystem: Make CROSSYSTEM_LOCK_PATH configurable
86b42b6a930c sign_android_image: calculate and store the vb meta digest
da1d153b4eed Move futility and cgpt to vendor partition
80955816aee0 futility: updater: Remove 'allow_empty_custom_label_tag' quirk
7ad2b0ab5035 futility: updater: Process custom label as standard models
13400d696a5e futility: updater: Remove signature_id from manifest
f770c7d074a2 futility: updater: Remove the legacy 'setvars.sh' manifest
ed4556edb968 tests/futility: Add test cases for unmodified RO
219026290256 futility/file_type_bios.c: Skip keyblock checks if magic is invalid
f5924321909d Fix partition type check for miniOS B
83f845b3b5da signing: clean up owners
dc5102f2f061 signing: miniOS signing in docker.
16e6aa8907fc futility: updater: Provide default DUT properties for emulation
e56f3686526c tests/futility/test_update: Fix --sys_props argument
7e2828a1bacf futility: updater: cleanup: Remove duplicated comments
060efa0cf64d vboot: Only execute TPM clear on nonchrome FW
2fc6815bf6b5 sign_official_build: Include full loem.ini path
47658f3c89e2 2lib/2load_kernel: Remove unused VB2_LOAD_PARTITION_WORKBUF_BYTES
7cc2ce4c902b futility: Skip printing EC RW version if non-printable
8365d546ce06 futility/load_fmap: Erase remaining bytes if file smaller than area
ec01126c04cd swap_ec_rw: Search for keyset in source tree too
b76d74dc08ac futility/load_fmap: use WARN() on non-critical error

Change-Id: I48f960235088c17dc59235b07926acd52e03deb2
Signed-off-by: Carlos López <carlos.lopez@openchip.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85676
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2024-12-21 02:19:18 +00:00
3rdparty Update vboot submodule to upstream main 2024-12-21 02:19:18 +00:00
configs mainboard: Add MiTAC Computing Whitestone-2 (LGA-4677) 2024-12-18 09:07:50 +00:00
Documentation docs: Add 24.12 release notes 2024-12-20 05:16:06 +00:00
LICENSES LICENSES: Add LGPL 2.1 license 2024-02-18 01:56:38 +00:00
payloads payloads/Linuxboot: Fix u-root build 2024-12-19 07:14:01 +00:00
spd spd/lp5: Add Hynix memory part 2024-11-30 05:03:59 +00:00
src mb/starlabs/starlite_adl: Configure GPIO interrupt for Virtual Button 2024-12-20 09:28:48 +00:00
tests tree: Fix cast an object of type 'nullptr_t' to 'uintptr_t' error 2024-10-29 01:41:41 +00:00
util util/ifdtool: Fix memory leaks 2024-12-20 20:50:48 +00:00
.checkpatch.conf .checkpatch.conf: Set max line length to 96 2024-12-04 07:36:22 +00:00
.clang-format Treewide: Fix incorrect SPDX license strings 2024-02-18 01:55:57 +00:00
.editorconfig
.gitignore .gitignore: Ignore payloads/libpayload/generated/ 2024-01-11 14:39:52 +00:00
.gitmodules 3rdparty/open-power-signing-utils: add SecureBoot utility for OpenPOWER 2024-09-06 13:55:50 +00:00
.gitreview
.mailmap
AUTHORS AUTHORS: Remove whitespaces at end of line 2024-05-24 11:06:45 +00:00
COPYING
gnat.adc drivers/intel/gma: Allow SPARK function with side effects 2024-03-01 18:46:30 +00:00
MAINTAINERS MAINTAINERS: Add Yuchi and Vasiliy for Intel Atom Snow Ridge SoC 2024-12-04 11:06:57 +00:00
Makefile Makefile: Fix no-op incremental build 2024-09-28 20:46:07 +00:00
Makefile.mk Makefile.mk: Suppress stack-usage LTO link warning 2024-11-06 04:55:09 +00:00
README.md Documentation: Update internal URL's 2024-01-04 14:22:51 +00:00
toolchain.mk arch/arm64: Use -mno-implicit-float with clang 2024-10-02 09:19:15 +00:00

coreboot README

coreboot is a Free Software project aimed at replacing the proprietary firmware (BIOS/UEFI) found in most computers. coreboot performs the required hardware initialization to configure the system, then passes control to a different executable, referred to in coreboot as the payload. Most often, the primary function of the payload is to boot the operating system (OS).

With the separation of hardware initialization and later boot logic, coreboot is perfect for a wide variety of situations. It can be used for specialized applications that run directly in the firmware, running operating systems from flash, loading custom bootloaders, or implementing firmware standards, like PC BIOS services or UEFI. This flexibility allows coreboot systems to include only the features necessary in the target application, reducing the amount of code and flash space required.

Source code

All source code for coreboot is stored in git. It is downloaded with the command:

git clone https://review.coreboot.org/coreboot.git.

Code reviews are done in the project's Gerrit instance.

The code may be browsed via coreboot's Gitiles instance.

The coreboot project also maintains a mirror of the project on github. This is read-only, as coreboot does not accept github pull requests, but allows browsing and downloading the coreboot source.

Payloads

After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.

See https://doc.coreboot.org/payloads.html for a list of some of coreboot's supported payloads.

Supported Hardware

The coreboot project supports a wide range of architectures, chipsets, devices, and mainboards. While not all of these are documented, you can find some information in the Architecture-specific documentation or the SOC-specific documentation.

For details about the specific mainboard devices that coreboot supports, please consult the Mainboard-specific documentation or the Board Status pages.

Releases

Releases are currently done by coreboot every quarter. The release archives contain the entire coreboot codebase from the time of the release, along with any external submodules. The submodules containing binaries are separated from the general release archives. All of the packages required to build the coreboot toolchains are also kept at coreboot.org in case the websites change, or those specific packages become unavailable in the future.

All releases are available on the coreboot download page.

Please note that the coreboot releases are best considered as snapshots of the codebase, and do not currently guarantee any sort of extra stability.

Build Requirements and building coreboot

The coreboot build, associated utilities and payloads require many additional tools and packages to build. The actual coreboot binary is typically built using a coreboot-controlled toolchain to provide reproducibility across various platforms. It is also possible, though not recommended, to make it directly with your system toolchain. Operating systems and distributions come with an unknown variety of system tools and utilities installed. Because of this, it isn't reasonable to list all the required packages to do a build, but the documentation lists the requirements for a few different Linux distributions.

To see the list of tools and libraries, along with a list of instructions to get started building coreboot, go to the Starting from scratch tutorial page.

That same page goes through how to use QEMU to boot the build and see the output.

Website and Mailing List

Further details on the project, as well as links to documentation and more can be found on the coreboot website:

https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

https://doc.coreboot.org/community/forums.html

Copyrights and Licenses

Uncopyrightable files

There are many files in the coreboot tree that we feel are not copyrightable due to a lack of creative content.

"In order to qualify for copyright protection in the United States, a work must satisfy the originality requirement, which has two parts. The work must have “at least a modicum” of creativity, and it must be the independent creation of its author."

https://guides.lib.umich.edu/copyrightbasics/copyrightability

Similar terms apply to other locations.

These uncopyrightable files include:

  • Empty files or files with only a comment explaining their existence. These may be required to exist as part of the build process but are not needed for the particular project.
  • Configuration files either in binary or text form. Examples would be files such as .vbt files describing graphics configuration, .apcb files containing configuration parameters for AMD firmware binaries, and spd files as binary .spd or text *spd*.hex representing memory chip configuration.
  • Machine-generated files containing version numbers, dates, hash values or other "non-creative" content.

As non-creative content, these files are in the public domain by default. As such, the coreboot project excludes them from the project's general license even though they may be included in a final binary.

If there are questions or concerns about this policy, please get in touch with the coreboot project via the mailing list.

Copyrights

The copyright on coreboot is owned by quite a large number of individual developers and companies. A list of companies and individuals with known copyright claims is present at the top level of the coreboot source tree in the 'AUTHORS' file. Please check the git history of each of the source files for details.

Licenses

Because of the way coreboot began, using a significant amount of source code from the Linux kernel, it's licensed the same way as the Linux Kernel, with GNU General Public License (GPL) Version 2. Individual files are licensed under various licenses, though all are compatible with GPLv2. The resulting coreboot image is licensed under the GPL, version 2. All source files should have an SPDX license identifier at the top for clarification.

Files under coreboot/Documentation/ are licensed under CC-BY 4.0 terms. As an exception, files under Documentation/ with a history older than 2017-05-24 might be under different licenses.

Files in the coreboot/src/commonlib/bsd directory are all licensed with the BSD-3-clause license. Many are also dual-licensed GPL-2.0-only or GPL-2.0-or-later. These files are intended to be shared with libpayload or other BSD licensed projects.

The libpayload project contained in coreboot/payloads/libpayload may be licensed as BSD or GPL, depending on the code pulled in during the build process. All GPL source code should be excluded unless the Kconfig option to include it is set.

The Software Freedom Conservancy

Since 2017, coreboot has been a member of The Software Freedom Conservancy, a nonprofit organization devoted to ethical technology and driving initiatives to make technology more inclusive. The conservancy acts as coreboot's fiscal sponsor and legal advisor.