Ronak Kanabar e1a27f2e49 vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2081_02 ... The headers added are generated as per FSP v2081_02. Previous FSP version was v2037. Changes Include: - Adjust UPD Offset in FspmUpd.h and FspsUpd.h - Add DevIntConfigPtr and NumOfDevIntConfig UPDs in Fsps.h BUG=b:180758116 BRANCH=None TEST=Build and boot ADLRVP Cq-Depend: chrome-internal:3669105 Change-Id: Ib99748a428709ffad27d47f600e00bd91b70d8f3 Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51248 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2021-03-10 20:30:20 +00:00
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amd	vc/amd/fsp/picasso: fix DDI enum name prefix	2021-03-04 23:51:21 +00:00
cavium	src: use ARRAY_SIZE where possible	2021-02-15 11:30:40 +00:00
eltan	vc/eltan/security/verified_boot/vboot_check.c: Add check PROG_POSTCAR	2021-01-15 11:18:58 +00:00
google	vc/google/chromeos: Account for GNVS allocated early	2021-02-17 22:58:32 +00:00
intel	vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2081_02	2021-03-10 20:30:20 +00:00
mediatek	vendor: mediatek: Add mediatek mt8192 dram initialization code	2021-03-08 01:49:52 +00:00
siemens	cbfs: Simplify load/map API names, remove type arguments	2020-12-02 22:13:17 +00:00
Makefile.inc	soc/mediatek/mt8192: initialize DRAM using vendor reference code	2021-03-08 03:15:43 +00:00