Max Blau 13bfd04a99 superio/fintek/f71808a: Add more optional ramstage registers ... Add more registers and make them optional, so they keep untouched/ their default if omitted. Change-Id: I5d8008176d2972976b387c558658b8e70b50af8e Signed-off-by: Max Blau <tripleshiftone@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32376 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>		2019-05-01 00:09:57 +00:00
..
acpi	src: Don't use a #defines like Kconfig symbols	2019-01-28 13:41:28 +00:00
common	superio/common/conf_mode: use pnp_write_config instead of outb calls	2019-01-25 17:53:59 +00:00
fintek	superio/fintek/f71808a: Add more optional ramstage registers	2019-05-01 00:09:57 +00:00
intel	device/pnp: Add header files for PNP ops	2019-03-04 15:58:55 +00:00
ite	coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)	2019-03-08 08:33:24 +00:00
nsc	src: Use 'include <string.h>' when appropriate	2019-03-20 20:27:51 +00:00
nuvoton	src: Use 'include <string.h>' when appropriate	2019-03-20 20:27:51 +00:00
renesas	src: include <assert.h> when appropriate	2019-04-23 10:01:36 +00:00
serverengines	device/pnp: Add header files for PNP ops	2019-03-04 15:58:55 +00:00
smsc	src: include <assert.h> when appropriate	2019-04-23 10:01:36 +00:00
via	coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)	2019-03-08 08:33:24 +00:00
winbond	src: Use 'include <string.h>' when appropriate	2019-03-20 20:27:51 +00:00
Makefile.inc