coreboot/src/arch
Lee Leahy 43d0d0d1f4 arch/x86: Share storage data structures between early stages
Define a common area in CAR so that the storage data structures can be
shared between stages.

TEST=Build and run on Reef

Change-Id: I20a01b850a31df9887a428bf07ca476c8410d33e
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/19300
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
2017-05-01 17:37:59 +02:00
..
arm Remove libverstage as separate library and source file class 2017-03-28 22:18:53 +02:00
arm64 Remove libverstage as separate library and source file class 2017-03-28 22:18:53 +02:00
mips build system: remove CBFSTOOL_PRE1_OPTS 2016-05-03 11:40:49 +02:00
power8 region: Add writeat and eraseat support 2016-06-24 20:48:12 +02:00
riscv riscv: Suppress invalid coverity errors 2017-02-20 04:40:01 +01:00
x86 arch/x86: Share storage data structures between early stages 2017-05-01 17:37:59 +02:00