coreboot/src
Kyösti Mälkki dfb2de80ec intel car: Move pre-ram stack guard lower
SPD data alone consumes 0x400 of pre-ram stack, so the guard was
initially set too high, printing spurious "smashed stack detected"
messages at end of romstage.

Use the same stack size as haswell.

Change-Id: I24fff6228bc5207750a3c4bf8cf34e91cf35e716
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/17501
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-11-20 03:10:06 +01:00
..
acpi
arch arch/x86/acpigen: Implement acpigen functions to return integer & string 2016-11-17 21:09:27 +01:00
commonlib commonlib/include: remove NEED_VB20_INTERNALS 2016-11-19 16:57:27 +01:00
console Revert "[WIP] console/Kconfig: Calculate COM port base addresses only on x86" 2016-10-18 18:41:16 +02:00
cpu intel car: Move pre-ram stack guard lower 2016-11-20 03:10:06 +01:00
device
drivers intel post-car: Increase stacktop alignment 2016-11-18 20:59:12 +01:00
ec ec/lenovo/h8: Add USB Always On 2016-11-18 18:14:42 +01:00
include rtc: Check update-in-progress bit 2016-11-17 23:08:43 +01:00
lib intel post-car: Increase stacktop alignment 2016-11-18 20:59:12 +01:00
mainboard ec/lenovo/h8: Add USB Always On 2016-11-18 18:14:42 +01:00
northbridge intel/sandybridge: Use romstage_handoff for S3 2016-11-18 21:03:05 +01:00
soc soc/intel/common/lpss_i2c: correct bus speed error 2016-11-19 16:56:23 +01:00
southbridge sb/lynxpoint: use hda_verb.c from VARIANT_DIR if applicable 2016-11-18 20:45:49 +01:00
superio sio/it8772f: add GPIO blink definition needed by google/tricky 2016-11-18 20:28:55 +01:00
vboot commonlib/include: remove NEED_VB20_INTERNALS 2016-11-19 16:57:27 +01:00
vendorcode google/chromeec: Add common infrastructure for boot-mode switches 2016-11-18 04:01:59 +01:00
Kconfig ACPI S3: Remove HIGH_MEMORY_SAVE where possible 2016-11-09 20:52:07 +01:00