coreboot/src/vendorcode
Ronak Kanabar ae0ea32c52 vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2471_02
The headers added are generated as per FSP v2471_02.
Previous FSP version was v2422_01.
Changes Include:
- UPDs description update in FspsUpd.h
- Adjust UPD Offset in FspmUpd.h and FspsUpd.h

BUG=b:208336249
BRANCH=None
TEST=Build and boot brya

Change-Id: I4d04652c06a1c1823d3859be209710c273a2ae8c
Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59757
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
2021-12-13 06:09:15 +00:00
..
amd Cezanne FSP wrapper: Sync with PI 1.0.0.5 2021-11-30 15:50:11 +00:00
cavium
eltan
google ChromeOS: Fix <vc/google/chromeos/chromeos.h> 2021-11-09 00:14:46 +00:00
intel vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2471_02 2021-12-13 06:09:15 +00:00
mediatek vc/mediatek/mt8195: Fix rank1 CKE setting for single-rank DRAM 2021-12-01 09:48:17 +00:00
siemens
Makefile.inc