Kyösti Mälkki de64078102 bootblock: Provide some common prototypes ... The split of bootblock initialisation to cpu, northbridge and southbridge is not specific to intel at all, create new header <arch/bootblock.h> as AMD will want some of these too. Change-Id: I702cc6bad4afee4f61acf58b9155608b28eb417e Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37429 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>		2019-12-14 14:08:57 +00:00
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apollolake	soc/intel/{apl,cnl,dnv,skl}: Skip ucode loading by FSP-T	2019-11-26 11:55:10 +00:00
baytrail	bootblock: Provide some common prototypes	2019-12-14 14:08:57 +00:00
braswell	printf: Automatically prefix %p with 0x	2019-12-11 11:38:59 +00:00
broadwell	bootblock: Provide some common prototypes	2019-12-14 14:08:57 +00:00
cannonlake	soc/intel/{cnl,icl,skl,tgl}: Remove unused gpe0_en_* from chip.h	2019-12-12 15:09:09 +00:00
common	soc/intel/common: Add PCI device IDs for CMP-H	2019-12-13 09:05:20 +00:00
denverton_ns	printf: Automatically prefix %p with 0x	2019-12-11 11:38:59 +00:00
icelake	soc/intel/{cnl,icl,skl,tgl}: Remove unused gpe0_en_* from chip.h	2019-12-12 15:09:09 +00:00
quark	printf: Automatically prefix %p with 0x	2019-12-11 11:38:59 +00:00
skylake	soc/intel/{cnl,icl,skl,tgl}: Remove unused gpe0_en_* from chip.h	2019-12-12 15:09:09 +00:00
tigerlake	soc/intel/{cnl,icl,skl,tgl}: Remove unused gpe0_en_* from chip.h	2019-12-12 15:09:09 +00:00
Kconfig	soc/intel/Kconfig: Load Tiger Lake SOC Kconfig	2019-12-11 11:37:45 +00:00