coreboot/src/soc/amd
Kevin Chiu de20b28fe4 mb/google/zork: correct USB2 phy TXVREFTUNE0 parameter name
From spec, [31:28] "HS DC Voltage Level Adjustment" is "TXVREFTUNE0".
correct rx_vref_tune -> tx_vref_tune

BUG=None
BRANCH=zork
TEST=emerge-zork coreboot

Signed-off-by: Kevin Chiu <kevin.chiu@quantatw.com>
Change-Id: I27003a952d8f8bdd8fe52af8a37010e23ee9cdfd
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47735
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2020-11-23 16:44:59 +00:00
..
common soc/amd: move non-CAR linker scripts to common directory 2020-11-22 17:35:20 +00:00
picasso mb/google/zork: correct USB2 phy TXVREFTUNE0 parameter name 2020-11-23 16:44:59 +00:00
stoneyridge soc/amd: factor out vbnv_cmos_failed() into soc/amd/common/vboot 2020-11-21 19:40:20 +00:00
Kconfig soc/amd: rename common Kconfig and use wildcard for SoC-specific Kconfig 2020-11-19 14:29:14 +00:00