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coreboot/src/southbridge
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Martin Roth 174a891121 southbridge/intel/fsp_rangeley: fix to include irqroute.h twice 
This matches what was done on baytrail in commit bfca984b -
soc/intel/fsp_baytrail: set up for including irqroute.h twice

irq_helper.h intentionally gets included into irqroute.asl twice - once
for pic mode and once for apic mode.  Since people are used to seeing
guard statements on the .h files, add the guards to irqroute.h and add
a comment to irq_helper.h explaining why they aren't there.

Change-Id: I709f9370ce7db1b3ffac2297aeaba5cc670ec20c
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/6606
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-08-18 02:24:21 +02:00
..
amd southbridge/amd/cimx/sb800: Uninitialized variables in config func 2014-08-13 04:50:00 +02:00
broadcom Rename coreboot_ram stage to ramstage 2014-04-26 13:27:09 +02:00
dmp dmp/vortex86ex/southbridge.c: Do not access arrays out of bound 2014-07-28 23:10:13 +02:00
intel southbridge/intel/fsp_rangeley: fix to include irqroute.h twice 2014-08-18 02:24:21 +02:00
nvidia southbridge,Makefile.inc: Trivial - drop trailing blank lines at EOF 2014-07-17 02:20:27 +02:00
rdc southbridge: Trivial - drop trailing blank lines at EOF 2014-07-08 13:53:21 +02:00
ricoh southbridge/ricoh,ti: Remove trailing whitespace in debug output 2014-08-10 08:27:41 +02:00
sis southbridge,Makefile.inc: Trivial - drop trailing blank lines at EOF 2014-07-17 02:20:27 +02:00
ti southbridge/ricoh,ti: Remove trailing whitespace in debug output 2014-08-10 08:27:41 +02:00
via southbridge/via: Remove trailing whitespace 2014-07-24 12:43:06 +02:00
Kconfig Add support for DMP Vortex86EX PCI southbridge. 2013-07-03 18:31:22 +02:00
Makefile.inc Add support for DMP Vortex86EX PCI southbridge. 2013-07-03 18:31:22 +02:00