If GPE_STS indicates that the wake source is internal PME, but none of the controllers have the PME_STS bit set, then try probing individual XHCI ports to see if one of those was a wake source. In some cases e.g. gsmi logging with S0ix, pci_pm_resume_noirq runs before gsmi callback and clears PME_STS_BIT in controller register. In such cases, xhci port status might provide a better idea about the wake source. BUG=b:67874513 Change-Id: I841bb2abccfa9bd6553c1513e88a6306b40315e4 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/22089 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
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| amd | ||
| broadcom/cygnus | ||
| dmp/vortex86ex | ||
| imgtec/pistachio | ||
| intel | ||
| lowrisc/lowrisc | ||
| marvell/mvmap2315 | ||
| mediatek/mt8173 | ||
| nvidia | ||
| qualcomm | ||
| rockchip | ||
| samsung | ||
| ucb/riscv | ||