coreboot/src
Karthikeyan Ramasubramanian dd4741c7bd vendorcode/google/chromeos: Build CSE Board Reset in Romstage
CSE Firmware Sync is being performed in romstage currently. But the CSE
board reset is not included as part of romstage. This causes the CSE
firmware sync to use global reset instead of EC assisted AP reset with
the old Cr50 Firmware version. Include the board specific CSE reset in
romstage.

BUG=b:171731175,b:177795247
BRANCH=dedede,volteer,puff
TEST=Ensured that the Drawlat boots to OS with both old(0.0.22) and
new(0.6.7) Cr50 FW versions.

Change-Id: I5e362271ffb68ffd5884279acd1ab0a462195a8a
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49850
Reviewed-by: Evan Green <evgreen@chromium.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-01-22 22:53:07 +00:00
..
acpi ACPI: Refactor ChromeOS specific ACPI GNVS 2021-01-18 18:02:27 +00:00
arch ach/x86/postcar.c: Avoid double CBMEM initialization 2021-01-21 11:03:04 +00:00
commonlib drivers/tpm: Implement full PPI 2020-12-21 02:38:20 +00:00
console lib/trace: Remove TRACE support 2020-12-02 23:35:58 +00:00
cpu cpu/intel/haswell: Enable timed MWAIT if supported 2021-01-22 14:25:22 +00:00
device device/oprom/x86emu/sys.c: Use __func__ 2021-01-18 09:44:02 +00:00
drivers drivers/intel/usb4: Enable retimer FW upgrade mux interaction 2021-01-22 14:28:08 +00:00
ec ec/google/chromeec: Provide EC access for Retimer firmware update 2021-01-22 14:28:20 +00:00
include types.h: Add a helper macro BITS_PER_BYTE 2021-01-22 14:26:58 +00:00
lib lib/device_tree.c: Remove repeated word 2021-01-18 07:38:49 +00:00
mainboard mb/amd/majolica: Add PSP support for board majolica 2021-01-22 15:45:39 +00:00
northbridge cpu/intel/socket_LGA775: Increase DCACHE_RAM_SIZE 2021-01-21 09:08:14 +00:00
security security/tpm/tss/tcg-1.2/tss.c: Use __func__ 2021-01-19 08:58:50 +00:00
soc soc/amd/cezanne: add pci_devs.h 2021-01-22 19:30:13 +00:00
southbridge ACPI GNVS: Drop APIC, factor out MPEN 2021-01-20 09:24:35 +00:00
superio src/superio: trim and move Makefile.inc, instead use wildcard matches 2020-12-27 14:46:07 +00:00
vendorcode vendorcode/google/chromeos: Build CSE Board Reset in Romstage 2021-01-22 22:53:07 +00:00
Kconfig Kconfig: Show console debug options if loglevel override is set 2020-12-11 15:58:24 +00:00