coreboot/src/northbridge
Elyes HAOUAS 400ce55566 cpu/amd: Use common AMD's MSR
Phase 1. Due to the size of the effort, this CL is broken into several
phases.

Change-Id: I0236e0960cd1e79558ea50c814e1de2830aa0550
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/29065
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
2018-10-18 12:51:26 +00:00
..
amd cpu/amd: Use common AMD's MSR 2018-10-18 12:51:26 +00:00
intel nb/intel/x4x: Fix P45 CAPID max frequency 2018-10-15 12:51:31 +00:00
via/vx900 src: Use tabs for indentation 2018-10-08 09:46:16 +00:00