8f0b0f7f95
This resolves a crash issue observed on Meteor Lake and introduced by
commit 70bdd2e1fa ("cpu/x86/topology:
Simplify CPU topology initialization"). This commit simplifies the
code and provides more detailed CPU topology information by
generalizing the use of the Extended Topology Enumeration Leaves
0x1f. As a result, the coreboot APIC core_id field does not provide
the fully detailed path information.
It turns out that the topology core identifier is used by the coreboot
MP service mp_get_processor_info() implementation. But the MP Service
EFI_CPU_PHYSICAL_LOCATION data structure only captures information
about the package, core, and thread. The core identifier returned to
the MP service caller must incorporate the full hierarchical path (die
group, die, module, tile, module and core).
This commit adds a new field to the cpu topology structure to
represent the core ID within the package.
For reference, here is that signature of the crash:
LAPIC 0x40 in X2APIC mode.
CPU Index 2 - APIC 64 Unexpected Exception:13 @ 10:69f3d1e4 - Halting
Code: 0 eflags: 00010046 cr2: 00000000
eax: 00000001 ebx: 69f313e8 ecx: 0000004e edx: 00000000
edi: 69f38018 esi: 00000029 ebp: 69aeee0c esp: 69aeedc0
[...]
The crash occurred when FSP attempted to lock the Protected
Processor Inventory Number Enable Control MSR (IA32_PPIN_CTL
0x4e).
69f3d1d3: 8b 43 f4 mov -0xc(%ebx),%eax
69f3d1d6: 89 4d c4 mov %ecx,-0x3c(%ebp)
69f3d1d9: 89 45 dc mov %eax,-0x24(%ebp)
69f3d1dc: 8b 55 c4 mov -0x3c(%ebp),%edx
69f3d1df: 8b 45 c0 mov -0x40(%ebp),%eax
69f3d1e2: 8b 4d dc mov -0x24(%ebp),%ecx
69f3d1e5: 0f 30 wrmsr
69f3d1e7: e9 ee fd ff ff jmp 0xfffffe39
FSP experiences issues due to attempting to lock the same register
multiple times for a single core. This is caused by an inconsistency
in the processor information data structure, where multiple cores
share the same identifier. This is not permitted and triggers a
General Protection Fault Exception.
TEST=Executing CpuFeaturesPei.efi in FSP-S does not crash on a rex
board.
Change-Id: I06db580cddaeaf5c452fa72f131d37d10dbc5974
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86004
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-by: Cliff Huang <cliff.huang@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Zhixing Ma <zhixing.ma@intel.com>
166 lines
2.9 KiB
C
166 lines
2.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef DEVICE_PATH_H
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#define DEVICE_PATH_H
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#include <stdint.h>
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enum device_path_type {
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DEVICE_PATH_NONE = 0,
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DEVICE_PATH_ROOT,
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DEVICE_PATH_PCI,
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DEVICE_PATH_PNP,
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DEVICE_PATH_I2C,
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DEVICE_PATH_APIC,
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DEVICE_PATH_DOMAIN,
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DEVICE_PATH_CPU_CLUSTER,
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DEVICE_PATH_CPU,
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DEVICE_PATH_CPU_BUS,
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DEVICE_PATH_IOAPIC,
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DEVICE_PATH_GENERIC,
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DEVICE_PATH_SPI,
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DEVICE_PATH_USB,
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DEVICE_PATH_MMIO,
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DEVICE_PATH_GPIO,
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DEVICE_PATH_MDIO,
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DEVICE_PATH_GICC_V3,
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/*
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* When adding path types to this table, please also update the
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* DEVICE_PATH_NAMES macro below.
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*/
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};
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#define DEVICE_PATH_NAMES { \
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"DEVICE_PATH_NONE", \
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"DEVICE_PATH_ROOT", \
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"DEVICE_PATH_PCI", \
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"DEVICE_PATH_PNP", \
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"DEVICE_PATH_I2C", \
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"DEVICE_PATH_APIC", \
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"DEVICE_PATH_DOMAIN", \
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"DEVICE_PATH_CPU_CLUSTER", \
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"DEVICE_PATH_CPU", \
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"DEVICE_PATH_CPU_BUS", \
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"DEVICE_PATH_IOAPIC", \
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"DEVICE_PATH_GENERIC", \
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"DEVICE_PATH_SPI", \
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"DEVICE_PATH_USB", \
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"DEVICE_PATH_MMIO", \
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"DEVICE_PATH_GPIO", \
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"DEVICE_PATH_MDIO", \
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"DEVICE_PATH_GICC_V3", \
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}
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struct domain_path {
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unsigned int domain_id;
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};
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struct pci_path {
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unsigned int devfn;
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};
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struct pnp_path {
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unsigned int port;
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unsigned int device;
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};
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struct i2c_path {
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unsigned int device;
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unsigned int mode_10bit;
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};
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struct spi_path {
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unsigned int cs;
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};
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struct apic_path {
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unsigned int initial_lapicid;
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unsigned int apic_id;
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unsigned int package_id;
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unsigned int node_id;
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unsigned int core_id;
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unsigned int thread_id;
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unsigned int module_id;
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/*
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* Core identifier within the package, including the die group, die, tile, module, and
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* specific core.
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*/
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unsigned int core_id_within_package;
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unsigned char core_type;
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};
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struct ioapic_path {
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uintptr_t addr;
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unsigned int ioapic_id;
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unsigned int gsi_base;
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};
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struct cpu_cluster_path {
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unsigned int cluster;
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};
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struct cpu_path {
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unsigned int id;
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};
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struct cpu_bus_path {
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unsigned int id;
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};
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struct generic_path {
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unsigned int id;
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unsigned int subid;
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};
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struct usb_path {
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unsigned int port_type;
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unsigned int port_id;
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};
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struct mmio_path {
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uintptr_t addr;
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};
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struct gpio_path {
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unsigned int id;
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};
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struct mdio_path {
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unsigned int addr;
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};
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struct gicc_v3_path {
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unsigned long long mpidr;
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unsigned int vgic_mi;
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unsigned int pi_gsiv;
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};
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struct device_path {
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enum device_path_type type;
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union {
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struct pci_path pci;
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struct pnp_path pnp;
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struct i2c_path i2c;
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struct apic_path apic;
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struct ioapic_path ioapic;
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struct domain_path domain;
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struct cpu_cluster_path cpu_cluster;
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struct cpu_path cpu;
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struct cpu_bus_path cpu_bus;
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struct generic_path generic;
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struct spi_path spi;
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struct usb_path usb;
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struct mmio_path mmio;
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struct gpio_path gpio;
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struct mdio_path mdio;
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struct gicc_v3_path gicc_v3;
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};
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};
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#define DEVICE_PATH_MAX 40
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#define BUS_PATH_MAX (DEVICE_PATH_MAX+10)
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extern const char *dev_path_name(enum device_path_type type);
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#endif /* DEVICE_PATH_H */
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