coreboot/src/cpu
Kyösti Mälkki e49f26a35f UPSTREAM: intel sandy/ivy: Increase XIP cache with USE_NATIVE_RAMINIT
Compiled romstage is over 64kiB and exceeded XIP_ROM_SIZE,
so it was not entirely set WRPROT cacheable.

Reduces first boot raminit (including training) time by 400ms.

BUG=None
BRANCH=None
TEST=None

Signed-off-by: Kysti Mlkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/17488
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

Change-Id: I5c4cbf581fc845150f207087c1527338ca364f60
Reviewed-on: https://chromium-review.googlesource.com/413253
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-11-21 11:53:52 -08:00
..
allwinner UPSTREAM: src/cpu: Remove unnecessary whitespace 2016-10-11 14:31:47 -07:00
amd UPSTREAM: amd/cpu: Add details to chip names 2016-11-10 18:31:34 -08:00
armltd vboot2: add verstage 2015-01-27 01:41:40 +01:00
dmp UPSTREAM: src/cpu: Improve code formatting 2016-09-07 00:16:15 -07:00
intel UPSTREAM: intel sandy/ivy: Increase XIP cache with USE_NATIVE_RAMINIT 2016-11-21 11:53:52 -08:00
qemu-power8 cpu/qemu-power8: don't enable it for qemu-x86 2016-02-19 20:03:52 +01:00
qemu-x86 qemu-x86: Enable SMP support 2015-12-08 15:54:27 +01:00
ti UPSTREAM: Kconfig: lay groundwork for not assuming SPI flash boot device 2016-08-19 14:19:51 -07:00
via UPSTREAM: src/cpu: Remove unnecessary whitespace 2016-10-11 14:31:47 -07:00
x86 UPSTREAM: cpu/x86/mtrr: allow temporary MTRR range during coreboot 2016-11-14 19:58:59 -08:00
Kconfig UPSTREAM: Kconfig: Add option for microcode filenames 2016-09-08 17:57:33 -07:00
Makefile.inc UPSTREAM: src/cpu: Fix location for cpu_microcode_blob.bin in COREBOOT CBFS only 2016-10-13 04:31:33 -07:00