John Zhao 282e75b118 soc/intel/alderlake: Update variable SD3C to only track enabled devices ... Each TCSS DMA is grouped together with two PCIe RPs in terms of PM flow. This change ensures that SD3C is updated for the TCSS DMA devices corresponding to the TBT RP ports. If TBT port is 0 or 1, SD3C for DMA0 is updated, else for DMA1. BUG=None TEST=Built Alderlake image successfully. Signed-off-by: John Zhao <john.zhao@intel.com> Change-Id: Ia3462dfbb287a374960a57bb4c3541db2a435611 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51965 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2021-04-06 07:04:26 +00:00
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amd	soc/amd/cezanne: Add soc/msr.h	2021-04-05 19:25:26 +00:00
cavium	cbfs: Simplify load/map API names, remove type arguments	2020-12-02 22:13:17 +00:00
example	arch/x86: Move prologue to .init section	2021-01-07 11:02:03 +00:00
intel	soc/intel/alderlake: Update variable SD3C to only track enabled devices	2021-04-06 07:04:26 +00:00
mediatek	soc/mediatek: Adjust hsa, hbp, hfp packets for MIPI_DSI_MODE_LINE_END	2021-03-27 10:03:41 +00:00
nvidia	cbfs: Replace more instances of cbfs_boot_locate() with newer APIs	2021-03-17 08:10:20 +00:00
qualcomm	cbfs: Remove prog_locate() for payloads (SELF and FIT)	2021-03-17 00:13:53 +00:00
rockchip	soc/rockchip/rk3399/sdram: Add channel to error message	2021-03-04 01:22:10 +00:00
samsung	cbfs: Pull handling of the CBFS_CACHE mem_pool into CBFS core	2021-03-08 22:31:29 +00:00
sifive	memlayout: Store region sizes as separate symbols	2021-02-19 08:39:26 +00:00
ti	soc/ti/am335x/mmc.c: Fix memset length argument	2021-04-04 09:58:26 +00:00
ucb	soc/ucb/riscv: Add chip_operations stub	2020-05-28 09:30:35 +00:00