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coreboot/src/vendorcode
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Ronak Kanabar 3e666898cd vendorcode/intel/fsp: Update FSP header for Tiger Lake 
Update FSPM header to include DisableDimmCh Upds for Tiger Lake
platform version 2457.

BUG=b:152000235
BRANCH=none
TEST="Build and Boot on Ripto/Volteer"

Change-Id: Ic743cb2134e6273a63c1212506c81ccbbdec442a
Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39797
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
2020-03-31 18:07:40 +00:00
..
amd vc/amd/fsp/picasso: Add PCIe and DDI helpers 2020-03-27 20:01:33 +00:00
cavium create stdio.h and stdarg.h for {,v}snprintf 2020-03-25 23:38:46 +00:00
eltan security/vboot: relocate and rename vboot_platform_is_resuming() 2020-03-31 10:38:07 +00:00
google src (minus soc and mainboard): Remove copyright notices 2020-03-17 18:26:34 +00:00
intel vendorcode/intel/fsp: Update FSP header for Tiger Lake 2020-03-31 18:07:40 +00:00
siemens src (minus soc and mainboard): Remove copyright notices 2020-03-17 18:26:34 +00:00
Makefile.inc vendorcode/eltan: Add vendor code for measured and verified boot 2019-06-04 10:41:53 +00:00