coreboot/src
Angel Pons d8fcd42089 mb/hp/280_g2: Add new mainboard
This is a µATX mainboard with a LGA1151 socket and two DDR4 DIMM slots.

There are two possible BOM configurations: Sid has no legacy devices,
whereas Manny provides two serial ports, a parallel port, a PCI slot
and PS/2 keyboard/mouse connectors. These boards also have different
Super I/O models: Manny uses an ITE IT8625E, whereas legacy-free Sid
comes with an ITE IT8656E instead.

This coreboot port has been done using a Sid board, thus support for
Manny-specific features is missing. Booting should still be possible,
though: none of these legacy features is essential.

The board has an unpopulated 6-pin header, wired to PCH UART 2. This
can be used to retrieve coreboot logs.

Working:
- Both DIMM slots (Micron CT4G4DFS8213.8FA11, Hynix HMA851U6AFR6N-UH)
- PCH SerialIO UART 2 to get coreboot logs
- Rear USB ports
- Realtek RTL8111 GbE NIC
- Integrated graphics on DVI with libgfxinit
- At least one SATA port
- Flashing internally with flashrom
- S3 suspend/resume
- VBT
- SeaBIOS 1.14 to boot Arch Linux (kernel linux-5.10.15.arch1-1)

Untested:
- Audio
- VGA: DP2VGA chip uses DDI E, and libgfxinit doesn't support DDI E yet
- Front USB headers
- Non-Linux OSes
- PCI slot
- IT8625E peripherals: serial, parallel and PS/2 ports

Change-Id: Iadf11c187307a24b15039a5a716737d9d74944e6
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48386
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-02-19 14:27:19 +00:00
..
acpi ACPI: Add acpi_reset_gnvs_for_wake() 2021-02-16 09:28:42 +00:00
arch memlayout: Store region sizes as separate symbols 2021-02-19 08:39:26 +00:00
commonlib commonlib/bsd: Fix direct inclusion of <endian.h> 2021-02-18 02:33:04 +00:00
console console/vtxprintf.c: Add missing <types.h> 2021-02-16 08:15:26 +00:00
cpu src/cpu: Remove unused symbols 2021-02-18 10:11:24 +00:00
device device/dram: Move SPD manufacturer names out of arch/x86 2021-02-16 10:43:11 +00:00
drivers drivers/i2c/hid: Enforce level triggered IRQ mode 2021-02-18 22:48:27 +00:00
ec src/ec/quanta/ene_kb3940q/acpi/battery.asl: Convert to ASL 2.0 2021-02-10 19:18:09 +00:00
include include/cpu/amd/msr: rename MSR_PSP_ADDR to PSP_ADDR_MSR 2021-02-19 13:20:16 +00:00
lib memlayout: Store region sizes as separate symbols 2021-02-19 08:39:26 +00:00
mainboard mb/hp/280_g2: Add new mainboard 2021-02-19 14:27:19 +00:00
northbridge nb/intel/pineview: Drop unused GPIO32 macro 2021-02-18 10:14:56 +00:00
security src/{drivers,security}: Remove unused <string.h> 2021-02-16 17:19:01 +00:00
soc include/cpu/amd/msr: rename MSR_PSP_ADDR to PSP_ADDR_MSR 2021-02-19 13:20:16 +00:00
southbridge southbridge: Ensure common Kconfig gets included last 2021-02-18 10:11:39 +00:00
superio superio/smsc/sch5545: Add missing <types.h> 2021-02-13 22:06:28 +00:00
vendorcode vc/google/chromeos: Account for GNVS allocated early 2021-02-17 22:58:32 +00:00
Kconfig southbridge: Ensure common Kconfig gets included last 2021-02-18 10:11:39 +00:00