coreboot/src/vendorcode
Julian Schroeder d2f3308ad7 soc/amd/cezanne: add support for the changed AMD FSP API for USB PHY
The AMD FSP is using a new structure for USB and USB C phy settings.
This patch removes old, unused structures, adds the new one and
enables the devicetree interface for it.

Signed-off-by: Julian Schroeder <julianmarcusschroeder@gmail.com>
Change-Id: I011ca40a334e4fd26778ca7f18b653298b14019b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54065
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Rob Barnes <robbarnes@google.com>
2021-05-26 15:15:53 +00:00
..
amd soc/amd/cezanne: add support for the changed AMD FSP API for USB PHY 2021-05-26 15:15:53 +00:00
cavium src: use ARRAY_SIZE where possible 2021-02-15 11:30:40 +00:00
eltan vc/eltan/security/mboot/Kconfig: Add dependency of VBOOT 2021-04-06 07:01:31 +00:00
google mb/google: Move ECFW_RW setting for non-ChromeEC boards 2021-04-30 06:48:56 +00:00
intel vendorcode/intel/fsp: Add Elkhart Lake FSP headers for FSP v3162 2021-05-26 14:09:08 +00:00
mediatek vendor/mediatek: Add MT8195 dram initialization code 2021-05-14 04:00:38 +00:00
siemens cbfs: Simplify load/map API names, remove type arguments 2020-12-02 22:13:17 +00:00
Makefile.inc soc/mediatek/mt8192: initialize DRAM using vendor reference code 2021-03-08 03:15:43 +00:00