coreboot/src
Patrick Georgi d69839bdfd build system: use full (in-tree) paths
So far we assumed that all files in *-srcs are below src/
which wasn't really true actually and will be less true with
future changes.

Fix up crt0.S handling on x86, which is covered by default rules
due to this change.

This is inspired by the commit listed below, but rewritten to match
upstream, and split in smaller pieces to keep intent clear.

Change-Id: Icae563c2d545b1aea809406e73faf3b417796a1b
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Based-On-Change-Id: I50af7dacf616e0f8ff4c43f4acc679089ad7022b
Based-On-Signed-off-by: Julius Werner <jwerner@chromium.org>
Based-On-Reviewed-on: https://chromium-review.googlesource.com/219170
Reviewed-on: http://review.coreboot.org/9288
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
2015-04-04 20:06:55 +02:00
..
arch build system: use full (in-tree) paths 2015-04-04 20:06:55 +02:00
console Avoid 64bit math on MIPS platforms 2015-03-30 21:42:38 +02:00
cpu build system: Introduce manual file type 2015-04-04 00:44:52 +02:00
device cbfs: correct types used for accessing files 2015-04-01 22:51:10 +02:00
drivers cbfs: correct types used for accessing files 2015-04-01 22:51:10 +02:00
ec chromeec: Add wakeup delay after SPI /CS assertion 2015-04-02 17:28:14 +02:00
include stddef: Add KHz, MHz and GHz constants 2015-04-04 15:01:51 +02:00
lib Add table driven way to add platform specific reg_script routines 2015-04-04 12:40:29 +02:00
mainboard rk3288: set cpu frequency up to 1.8GHz 2015-04-04 15:05:12 +02:00
northbridge northbridge/amd/amdfam10: Generate SMBIOS tables for RAM 2015-04-02 05:55:41 +02:00
soc rk3288: set cpu frequency up to 1.8GHz 2015-04-04 15:05:12 +02:00
southbridge southbridge/amd/pi: Add initialization of 8254 and 8259 2015-04-02 19:19:20 +02:00
superio superio: ite8772f: Exit extemp busy state 2015-03-21 08:44:28 +01:00
vendorcode vboot: add vbnv flash driver 2015-04-02 13:24:29 +02:00
Kconfig Clean up architecture-specific Kconfigs 2015-04-02 22:06:31 +02:00