coreboot/src
David Hendricks d60d2018d1 pit: update PMIC write sequence in romstage
This update the PMIC write sequence to be correct for newer board
revisions.

Signed-off-by: David Hendricks <dhendrix@chromium.org>

BUG=none
BRANCH=none
TEST=compile tested...

Change-Id: I2210b0d1945fb19c96a674c8fad1b0ff5a4a381e
Reviewed-on: https://gerrit.chromium.org/gerrit/64304
Reviewed-by: Ronald G. Minnich <rminnich@chromium.org>
Commit-Queue: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
2013-08-01 23:07:16 -07:00
..
arch ARM: Don't use const pointers with the write functions. 2013-07-31 12:33:06 -07:00
console Don't try to use CBMEM console in bootblock 2013-06-20 15:51:33 -07:00
cpu exynos5420: update set_cpu_id() 2013-08-01 23:07:15 -07:00
device Log device path during resource allocation 2013-07-09 13:27:45 -07:00
drivers max77802: update header 2013-08-01 23:07:16 -07:00
ec chromeec: Add event methods for EC requested throttle 2013-08-01 00:30:25 -07:00
include lynxpoint: Route all USB ports to XHCI in finalize step 2013-07-31 13:15:55 -07:00
lib Patch to calculate transcoder flags based on pipe config. 2013-07-31 12:33:20 -07:00
mainboard pit: update PMIC write sequence in romstage 2013-08-01 23:07:16 -07:00
northbridge haswell: Add pei_data field for USB routing 2013-07-31 13:15:53 -07:00
southbridge lynxpoint: XHCI: Advertise D3 as lowest wake state 2013-07-31 13:15:56 -07:00
superio Drop prototype guarding for romcc 2013-05-10 11:55:20 -07:00
vendorcode Rename cpu/x86/car.h to arch/early_variables.h 2013-07-30 13:40:23 -07:00
Kconfig Add a HAVE_ARCH_MEMMOVE option to allow overriding memmove. 2013-07-08 11:30:26 -07:00