coreboot/src/southbridge
zbao e0849350aa AMD/spi: Do not reset fifo after skipping the sent bytes
After we skip the bytes we send, the fifo pointer is at
right position. Reseting the fifo will change it to a
wrong place.

Please view the flashrom code, which tells the same thing.
https://code.coreboot.org/p/flashrom/source/tree/HEAD/trunk/sb600spi.c#L257

Change-Id: I31d487ce32c0d7ca3dead36d2b14611e73b1ad60
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/14955
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-05-30 06:09:21 +02:00
..
amd AMD/spi: Do not reset fifo after skipping the sent bytes 2016-05-30 06:09:21 +02:00
broadcom tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
intel intel/sch: Merge northbridge and southbridge in src/soc 2016-05-17 21:38:17 +02:00
nvidia southbridge/nvidia: Update license headers 2016-04-13 17:35:29 +02:00
ricoh/rl5c476 southbridge/ricoh: Update license headers 2016-04-13 17:35:43 +02:00
sis/sis966 drivers/pc80: Add PS/2 mouse presence detect 2016-02-01 22:10:46 +01:00
ti southbridge/ti: Update license headers 2016-04-13 17:36:00 +02:00
via southbridge/via: Update license headers 2016-04-13 17:36:14 +02:00