coreboot/src/mainboard/roda
Arthur Heymans 58bf6ac2ab UPSTREAM: sb/ich7: Use common/gpio.h to set up GPIOs
This is more consistent with newer Intel targets.

This a static struct so it is initialized to 0 by default.
To make it more readable:
* only setting to GPIO mode is made explicit;
* only pins in GPIO mode are either set to input or output since this
is ignored in native mode;
* only output pins are set high or low, since this is read-only on
input;
* blink is only operational on output pins, non-blink is not set
explicitly;
* invert is only operational on input pins, non-invert is not set
explicitly.

Change-Id: I05f9c52dee78b7120b225982c040e3dcc8ee3e4e
Original-Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Original-Reviewed-on: https://review.coreboot.org/17639
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Nico Huber <nico.h@gmx.de>
Original-Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Original-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/425981
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
2017-01-09 23:46:48 -08:00
..
rk9 UPSTREAM: intel/gm45: Use romstage_handoff for S3 2016-12-13 17:49:04 -08:00
rk886ex UPSTREAM: sb/ich7: Use common/gpio.h to set up GPIOs 2017-01-09 23:46:48 -08:00
rv11 UPSTREAM: mb/roda/rv11: Add new boards Lizard RV11 and RW11 2016-12-16 07:51:52 -08:00
Kconfig
Kconfig.name