Ronak Kanabar 2f67badda6 vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2037 ... The headers added are generated as per FSP v2037. Previous FSP version was v2037. Changes Include: - add BootFrequency, RMTBIT, RmtPerTask, RMTLoopCount and MrcFastBoot UPDs in Fspm.h - add EnableFastMsrHwpReq, VbtSize, CpuPcieComplianceTestMode, LidStatus and PcieComplianceTestMode UPDs in Fsps.h BUG=b:178461282,b:180627057 BRANCH=None TEST=Build and boot ADLRVP Change-Id: I5496dfebc7b65a94abb31244ef2b400d89d6d444 Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50914 Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2021-02-25 15:50:36 +00:00
..
amd	src: use ARRAY_SIZE where possible	2021-02-15 11:30:40 +00:00
cavium	src: use ARRAY_SIZE where possible	2021-02-15 11:30:40 +00:00
eltan	vc/eltan/security/verified_boot/vboot_check.c: Add check PROG_POSTCAR	2021-01-15 11:18:58 +00:00
google	vc/google/chromeos: Account for GNVS allocated early	2021-02-17 22:58:32 +00:00
intel	vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2037	2021-02-25 15:50:36 +00:00
siemens	cbfs: Simplify load/map API names, remove type arguments	2020-12-02 22:13:17 +00:00
Makefile.inc	vendorcode/eltan: Add vendor code for measured and verified boot	2019-06-04 10:41:53 +00:00