coreboot/src/northbridge
Felix Held 432575c5d3 x4x/raminit_ddr23: use MCHBAR AND/OR/AND_OR macros [1/2]
When using timeless builds and coreboot crossgcc 6.3.0, the checksum of the
resulting binary doesn't change with applying this commit.

Change-Id: I057abe314622e92000c7e4ff2faa4595edb5244b
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/27717
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2018-07-30 20:44:37 +00:00
..
amd AGESA binaryPI: Remove code for CONFIG_CBB!=0 2018-07-23 08:02:23 +00:00
intel x4x/raminit_ddr23: use MCHBAR AND/OR/AND_OR macros [1/2] 2018-07-30 20:44:37 +00:00
via/vx900 src/northbridge: Use "foo *bar" instead of "foo* bar" 2018-07-09 09:29:53 +00:00