Mike Banon 8b7bda40f1 nb/amd/agesa: define DDR3_SPD_SIZE as a common value ... Move a size of DDR3 SPD memory (always 256 bytes) to a common define. Signed-off-by: Mike Banon <mikebdp2@gmail.com> Change-Id: I80c89ff6e44526e1d75b0e933b21801ed17c98c0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/44498 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>		2020-08-24 09:18:12 +00:00
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agesa	nb/amd/agesa: define DDR3_SPD_SIZE as a common value	2020-08-24 09:18:12 +00:00
pi	nb/amd/pi/00730F01/northbridge.c: Add include <types.h>	2020-07-26 21:36:06 +00:00