coreboot/src
Yidi Lin cfc26ce278 mb/google/asurada: Implement HW reset function
TEST=call do_board_reset() manually.

Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
Change-Id: I355f71e731f1045cd80a133cd31cf4d55f14d91f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49237
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
2021-01-15 06:59:23 +00:00
..
acpi ACPI: Have single call-site for acpi_inject_nvsa() 2021-01-13 18:30:13 +00:00
arch arch/x86/Makefile.inc: Clean up generated assembly stubs 2021-01-08 08:10:04 +00:00
commonlib drivers/tpm: Implement full PPI 2020-12-21 02:38:20 +00:00
console lib/trace: Remove TRACE support 2020-12-02 23:35:58 +00:00
cpu build system: Structure and serialize INTERMEDIATE 2021-01-14 16:53:06 +00:00
device device/pci_device.c: Use same indents for switch/case 2021-01-12 13:33:59 +00:00
drivers drivers/genesyslogic/gl9763e: Add HS400ES compatibility settings 2021-01-12 04:52:16 +00:00
ec build system: Structure and serialize INTERMEDIATE 2021-01-14 16:53:06 +00:00
include ACPI: Have single call-site for acpi_inject_nvsa() 2021-01-13 18:30:13 +00:00
lib arch/x86: Move prologue to .init section 2021-01-07 11:02:03 +00:00
mainboard mb/google/asurada: Implement HW reset function 2021-01-15 06:59:23 +00:00
northbridge nb/intel/gm45: Guard macro parameters 2021-01-10 23:03:33 +00:00
security build system: Structure and serialize INTERMEDIATE 2021-01-14 16:53:06 +00:00
soc soc/amd/cezanne,picasso/uart: remove unneeded struct name 2021-01-15 01:19:59 +00:00
southbridge build system: Structure and serialize INTERMEDIATE 2021-01-14 16:53:06 +00:00
superio src/superio: trim and move Makefile.inc, instead use wildcard matches 2020-12-27 14:46:07 +00:00
vendorcode {soc,vc,mb}/intel: Drop support for Cannon Lake SoC 2021-01-11 17:23:53 +00:00
Kconfig Kconfig: Show console debug options if loglevel override is set 2020-12-11 15:58:24 +00:00