coreboot/src/vendorcode
Aaron Durbin 597135052f UPSTREAM: Kconfig: provide MAINBOARD_HAS_TPM_CR50 option
The CR50 TPM can do both SPI and I2C communication. However,
there's situations where policy needs to be applied for CR50
generically regardless of the I/O transport. Therefore add
MAINBOARD_HAS_TPM_CR50 to encompass that.  Additionally,
once the mainboard has selected CR50 TPM automatically select
MAINBOARD_HAS_TPM2 since CR50 TPM is TPM 2.0.

Change-Id: I878f9b9dc99cfb0252d6fef7fc020fa3d391fcec
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/19370
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins)
Reviewed-on: https://chromium-review.googlesource.com/482741
Commit-Ready: Daniel Kurtz <djkurtz@chromium.org>
Tested-by: Daniel Kurtz <djkurtz@chromium.org>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
2017-04-25 01:45:37 -07:00
..
amd UPSTREAM: AGESA f14: Fix memory clock register decoding 2017-04-10 14:28:38 -07:00
google UPSTREAM: Kconfig: provide MAINBOARD_HAS_TPM_CR50 option 2017-04-25 01:45:37 -07:00
intel UPSTREAM: KBL: Update FSP headers - upgrade to FSP 2.0.0 2017-04-13 23:54:07 -07:00
siemens UPSTREAM: vendorcode/siemens: Ensure a given info block is available for a field 2016-12-08 12:30:42 -08:00
Makefile.inc vendorcode/siemens: Add hwilib for Siemens specific info struct 2016-04-28 08:15:47 +02:00