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coreboot/src/soc/intel
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Andrey Petrov cf270f0d62 soc/intel/xeon_sp/cpx: Enable common P2SB 
Use common P2SB driver. This is needed to address a problem when
enumerator does not see p2sb device (since it is hidden) but it
is active and BAR is decoded.

Change-Id: I9cb821a5684f15f1e1486872bf806a6ee3d0676f
Signed-off-by: Andrey Petrov <anpetrov@fb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40920
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-05-01 23:12:02 +00:00
..
apollolake src: Remove unused 'include <cpu/x86/cache.h>' 2020-05-01 06:10:49 +00:00
baytrail soc/intel/baytrail: Fix 16-bit read/write PCI_COMMAND register 2020-05-01 16:40:20 +00:00
braswell soc/intel/braswell: Fix 16-bit read/write PCI_COMMAND register 2020-05-01 16:37:13 +00:00
broadwell soc/intel/broadwell: Fix 16-bit read/write PCI_COMMAND register 2020-05-01 16:35:06 +00:00
cannonlake soc/intel/cannonlake: Fix 16-bit read/write PCI_COMMAND register 2020-05-01 16:36:28 +00:00
common soc/intel/common: Fix 16-bit read/write PCI_COMMAND register 2020-05-01 16:36:26 +00:00
denverton_ns src: Remove unused 'include <cpu/x86/cache.h>' 2020-05-01 06:10:49 +00:00
icelake src: Remove unused 'include <cpu/x86/cache.h>' 2020-05-01 06:10:49 +00:00
jasperlake soc/intel/{jsl,tgl}: Rename PcdDebugInterfaceFlags macros for better understanding 2020-05-01 06:56:45 +00:00
quark src: Remove unused 'include <cpu/x86/cache.h>' 2020-05-01 06:10:49 +00:00
skylake src: Remove not used 'include <smbios.h>' 2020-05-01 06:16:33 +00:00
tigerlake soc/intel/{jsl,tgl}: Rename PcdDebugInterfaceFlags macros for better understanding 2020-05-01 06:56:45 +00:00
xeon_sp soc/intel/xeon_sp/cpx: Enable common P2SB 2020-05-01 23:12:02 +00:00
Kconfig fsp2_0: Gather Kconfig declarations 2020-04-05 23:26:24 +00:00