coreboot/src/soc/intel
Aaron Durbin ced995a89f skylake: clarify and fix gpio macros
The gpio pad configuration currently defaults to ACPI
owned GPIs. A '0' was used which wasn't so clear. Add
a comment and explicitly set it to ACPI. Also,
PAD_CFG_GPI_ACPI_SMI wasn't using the _PAD_CFG_ATTRS
macro which causes compliation errors if attempted
to be instantiated. No piece of code tried to use
it so the error was overlooked.

Lastly, allow for soc/gpio.h to be included during
ASL compilation. That allows for gpio_defs.h to be
included and those macros utilized without needing
to know the file name and where it lives; just use
the generic gpio.h.

BUG=chrome-os-partner:43778
BRANCH=None
TEST=Built and booted glados.

Original-Change-Id: I9dbadb0b494683ab38babfc1ac5e13093ee37730
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/291935
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>

Change-Id: Id4fa8b65ec1e1537dbf09824c2155119a768807e
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11206
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-08-14 15:21:04 +02:00
..
baytrail x86: Drop -Wa,--divide 2015-07-07 18:30:55 +02:00
braswell intel/common: fix stage_cache_external_region() 2015-08-14 15:19:31 +02:00
broadwell azalia: fix up and clean up shrinkage of boilerplate code 2015-07-14 13:40:07 +02:00
common intel/common: fix stage_cache_external_region() 2015-08-14 15:19:31 +02:00
fsp_baytrail intel/fsp_baytrail: Support Baytrail FSP Gold4 release 2015-07-21 22:32:23 +02:00
skylake skylake: clarify and fix gpio macros 2015-08-14 15:21:04 +02:00