coreboot/src
Jonathan Zhang ce0e2a0140 drivers/intel/fsp2_0: use FSP to allocate APEI BERT memory region
APEI (ACPI Platform Error Interface) defines BERT (Boot Error Record
Table) memory region:
* Bootloader (firmware) generates UEFI CPER (Common Platform Error
Record) records, and populates BERT region.
* OS parses ACPI BERT table, finds the BERT region address, inteprets
the data and processes it accordingly.

When CONFIG_ACPI_BERT is defined, update FSP UPD BootLoaderTolumSize,
so FSP allocates memory region for it. The APEI BERT region is placed
on top of CBMEM, for the size of CONFIG_ACPI_BERT_SIZE.

Apart from APEI BERT region, we also have plan to add APEI HEST region
which holds OS runtime hardware error record, based on firmware
first hardware error handling model. HEST region will be reserved
same way as BERT region.

Note that CBMEM region can not be used for such purpose, the OS
(bert/hest) drivers are not able to access data held in CBMEM region,
as CBMEM is set as type 16 (configuration table).

An option considered was to reserve the BERT region under CBMEM.
However, we do not know the size of CBMEM till acpi tables are set up.
On the other hand, BERT region needs to be filled up before ACPI BERT
table is finalized.

Change-Id: Ie72240e4c5fa01fcf937d33678c40f9ca826487a
Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45391
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-10-02 11:43:23 +00:00
..
acpi acpi: Add SSDT pstate helper functions 2020-09-22 16:06:34 +00:00
arch cpu/qemu-x86/car: Move long mode entry right before c entry 2020-09-29 12:27:04 +00:00
commonlib src/commonlib: Drop unneeded empty lines 2020-09-21 15:53:25 +00:00
console src/console: Drop unneeded empty lines 2020-09-21 15:52:42 +00:00
cpu cpu/qemu-x86/car: Move long mode entry right before c entry 2020-09-29 12:27:04 +00:00
device superio/common: Fix NULL pointer dereferences 2020-09-28 09:31:28 +00:00
drivers drivers/intel/fsp2_0: use FSP to allocate APEI BERT memory region 2020-10-02 11:43:23 +00:00
ec ec/hp/kbc1126: Support not putting EC firmware in CBFS 2020-09-28 09:26:54 +00:00
include soc/intel/jasperlake: Add IGD, MCH Device ID 2020-09-29 06:52:40 +00:00
lib lib/Makefile.inc: fix name of config string 2020-09-26 19:33:49 +00:00
mainboard mb/intel/tglrvp/variants/tglrvp_up4 - Enable onboard HDMI and type-C displays for TGL-Y RVP 2020-10-01 22:27:48 +00:00
northbridge nb/intel/gm45: Answer question about conversion stepping A1 2020-09-29 06:00:49 +00:00
security security/intel/stm: Fix size_t printf format error 2020-10-01 18:59:18 +00:00
soc soc/amd/picasso: Add fields for the PSP to the transfer struct 2020-09-30 19:23:14 +00:00
southbridge sb/intel/lynxpoint/acpi/pch.asl: Drop unused lines 2020-09-27 22:46:41 +00:00
superio superio/ite: Distinguish between chips for PECI readings 2020-09-22 01:11:02 +00:00
vendorcode vc/amd/fsp/picasso: Add bit definitions for PSP info in transfer block 2020-10-01 00:47:58 +00:00
Kconfig treewide/Kconfig: Drop unneeded empty lines 2020-09-21 16:30:14 +00:00