coreboot/util/ifdtool
Filip Gołaś f4271cad0a ifdtool: Add set top swap size PCH strap subcommand
Top-Block Swap mode of Intel PCH allows to swap the boot block with
another location placed directly below it by redirecting the memory
accesses.

The range of the addresses to be redirected is configured using the Top
Swap Block Size (or BOOT_BLOCK_SIZE) PCH strap using 3 bits to encode
one of 8 sizes:
    64 KB, 128 KB, 256 KB, 512 KB, 1 MB, 2 MB, 4 MB or 8 MB.

The source and target ranges depend on the configured size, eg:
- 64 KB  - FFFF_0000h - FFFF_FFFFh -> FFFE_0000h - FFFE_FFFFh
- 128 KB - FFFE_0000h - FFFF_FFFFh -> FFFC_0000h - FFFD_FFFFh
- 8 MB   - FF80_0000h - FFFF_FFFFh -> FF00_0000h - FF7F_FFFFh

Only supporting Alder Lake-P and Alder Lake-N for now.

Needed for the bootblock redundancy feature suggested at
https://mail.coreboot.org/archives/list/coreboot@coreboot.org/thread/C6JN2PB7K7D67EG7OIKB6BBERZU5YV35/

TEST=check using xxd, MFIT tool, ensure VP6670 boots
Test details:
xxd:
  ./util/ifdtool/ifdtool -p adl -T 0x10000 vp66xx_fd.bin && \
  xxd vp66xx_fd.bin > vp66xx.hex && \
  xxd vp66xx_fd.bin.new > vp66xx_fd.new.hex && \
  diff -au vp66xx_fd.hex vp66xx_fd.new.hex

File vp66xx_fd.bin is 4096 bytes
Writing new image to vp66xx_fd.bin.new

--- vp66xx_fd.hex       2025-10-08 12:03:09.527193533 +0200
+++ vp66xx_fd.new.hex   2025-10-08 12:05:08.717108142 +0200
@@ -18,7 +18,7 @@
 00000110: 7f78 0700 0000 0000 1800 0000 0000 1f00  .x..............
 00000120: 0808 1170 0000 0000 0000 7f06 80f8 8107  ...p............
 00000130: 0000 0000 0f00 0000 2222 2222 2202 2222  ........""""".""
-00000140: 0000 0000 0000 0000 0000 ff00 6000 80c8  ............`...
+00000140: 0000 0000 0000 0000 0000 ff00 0000 80c8  ................
 00000150: 4586 0036 0000 0000 0002 5800 0000 4000  E..6......X...@.
 00000160: 0018 0000 0000 0000 0000 0000 0000 0000  ................
 00000170: 0000 0000 0000 0000 54b3 04a0 3000 0140  ........T...0..@

mfittool:
./mfit --gui -decompose protectli_vp66xx_v0.9.2.rom
In the UI:
Flash Settings > BIOS Configuration > Top Swap Block Size
shows the value changing to the expected one, ie.
    -T 0x10000 results in 64kB
    -T 0x20000 results in 128kB
    -T 0x400000 results in 4MB
    etc.

Change-Id: I50e9d4160ee4b60e83567bcd33c9d80d428cf2bb
Signed-off-by: Filip Gołaś <filip.golas@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/89438
Reviewed-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2025-10-22 18:48:58 +00:00
..
.gitignore .gitignore: Ignore .test/.dependencies globally 2020-10-31 18:21:36 +00:00
description.md util: Add description.md to each util 2018-07-26 13:26:50 +00:00
ifdtool.c ifdtool: Add set top swap size PCH strap subcommand 2025-10-22 18:48:58 +00:00
ifdtool.h util/ifdtool: Add Panther Lake platform support under IFDv2 2024-06-21 03:20:46 +00:00
Makefile util: Rename Makefiles from .inc to .mk 2024-01-26 12:43:18 +00:00
Makefile.mk util: Rename Makefiles from .inc to .mk 2024-01-26 12:43:18 +00:00