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Furquan Shaikh cc6c41f8d8 mb/google/zork: Switch USI_RESET to active low polarity for v3.6+ 
v3.6 of reference schematics have switched the polarity of reset
signal to touchscreen controller from active high to active low. This
change updates the default configuration in baseboard gpio tables to
set the reset GPIO to output low and override tables in variants to set the
reset GPIO to output high. Additionally, devicetree by default exposes
ACTIVE_LOW configuration for reset GPIO. In order to support pre-v3.6
boards, reset GPIO is updated to ACTIVE_HIGH based on board version.

BUG=b:161937506

Change-Id: I092f274d8eb1920a1cd6d3eccbe8f26b0b28928a
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44192
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2020-08-06 19:09:03 +00:00
3rdparty 3rdparty/amd_blobs: Move pointer to 0.8.5.7B 2020-07-30 16:40:58 +00:00
configs configs: Add a weird config for Asrock B85M Pro4 2020-08-02 13:09:06 +00:00
Documentation Documentation: Fix sphinx configuration 2020-08-04 12:18:29 +00:00
LICENSES drivers: Use SPDX identifiers 2020-05-25 22:19:21 +00:00
payloads libpayload: Replace include/compiler.h with commonlib/bsd's version 2020-07-28 16:16:21 +00:00
src mb/google/zork: Switch USI_RESET to active low polarity for v3.6+ 2020-08-06 19:09:03 +00:00
tests tests: Improve test_skip_atoi() in /lib/string-test test case 2020-07-12 19:38:39 +00:00
util util/ifdtool: Add Alderlake platform support under IFDv2 2020-08-01 06:55:25 +00:00
.checkpatch.conf .checkpatch.conf: Ignore a few more warnings 2018-08-13 12:23:24 +00:00
.clang-format lint/clang-format: set to 96 chars per line 2019-06-13 20:14:00 +00:00
.editorconfig Add .editorconfig file 2019-09-10 12:52:18 +00:00
.gitignore cbfstool: Build vboot library 2020-03-23 08:34:23 +00:00
.gitmodules Add qc_blobs repository 2020-06-30 08:57:03 +00:00
.gitreview add .gitreview 2012-11-01 23:13:39 +01:00
AUTHORS AUTHORS, util/: Drop individual copyright notices 2020-05-09 21:21:32 +00:00
COPYING update license template. 2006-08-12 22:03:36 +00:00
gnat.adc treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
MAINTAINERS MAINTAINERS: Add Jeremy Soller for ec/system76 and mb/system76 2020-07-23 09:30:48 +00:00
Makefile build system: Rely on xcompile for HOSTCC and HOSTCXX 2020-07-08 08:53:46 +00:00
Makefile.inc assert.h: Do not use __FILE__ nor __LINE__ on timeless builds 2020-07-24 23:23:54 +00:00
README.md README.md: Remove link to deprecated wiki 2019-11-16 20:39:55 +00:00
toolchain.inc Remove MAYBE_STATIC_BSS and ENV_STAGE_HAS_BSS_SECTION 2020-05-26 15:04:08 +00:00

README.md

coreboot README

coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.

With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.

coreboot was formerly known as LinuxBIOS.

Payloads

After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.

See https://www.coreboot.org/Payloads for a list of supported payloads.

Supported Hardware

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

Build Requirements

  • make
  • gcc / g++ Because Linux distribution compilers tend to use lots of patches. coreboot does lots of "unusual" things in its build system, some of which break due to those patches, sometimes by gcc aborting, sometimes - and that's worse - by generating broken object code. Two options: use our toolchain (eg. make crosstools-i386) or enable the ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this case).
  • iasl (for targets with ACPI support)
  • pkg-config
  • libssl-dev (openssl)

Optional:

  • doxygen (for generating/viewing documentation)
  • gdb (for better debugging facilities on some targets)
  • ncurses (for make menuconfig and make nconfig)
  • flex and bison (for regenerating parsers)

Building coreboot

Please consult https://www.coreboot.org/Build_HOWTO for details.

Testing coreboot Without Modifying Your Hardware

If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.

Please see https://www.coreboot.org/QEMU for details.

Website and Mailing List

Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:

https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

https://www.coreboot.org/Mailinglist

Copyright and License

The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.