coreboot/src/soc
Keith Short cc68c01bec src/soc/intel/common: Clear GPIO driver ownership when not requested
The default state of the HOSTSW_OWN register in the PCH is zero, which
configures GPIO pins for ACPI ownership.  The board variabt GPIO tables
can request specific pins to be configured for GPIO driver ownership.
This change sets the HOSTSW_OWN ownership bit when requested and
explicitly clears the ownership bit if not requested.

BUG=b:120884290
BRANCH=none
TEST=Build coreboot on sarien.  Verified UEFI to coreboot transition
boots successfully.

Change-Id: Ia82539dbbbc7cf5dfb9223902d563cafec1a73e5
Signed-off-by: Keith Short <keithshort@chromium.org>
Reviewed-on: https://review.coreboot.org/c/31209
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2019-02-05 13:27:49 +00:00
..
amd soc/amd/stoneyridge: Reboot if missing MRC cache info 2019-02-04 21:17:57 +00:00
cavium cbmem_top: Fix comment and remove upper limit 2019-01-24 13:54:21 +00:00
imgtec (console,drivers/uart)/Kconfig: Fix dependencies 2018-11-21 22:49:48 +00:00
intel src/soc/intel/common: Clear GPIO driver ownership when not requested 2019-02-05 13:27:49 +00:00
mediatek google/kukui: Move some initialization from bootblock to verstage 2019-01-29 13:10:47 +00:00
nvidia console: Change BOOTBLOCK_CONSOLE default to y 2019-01-14 12:13:55 +00:00
qualcomm console: Change BOOTBLOCK_CONSOLE default to y 2019-01-14 12:13:55 +00:00
rockchip src: Don't use a #defines like Kconfig symbols 2019-01-28 13:41:28 +00:00
samsung src: Don't use a #defines like Kconfig symbols 2019-01-28 13:41:28 +00:00
sifive riscv: ARCH_RISCV_RV{32,64} selects ARCH_RISCV 2019-01-24 14:21:01 +00:00
ucb riscv: ARCH_RISCV_RV{32,64} selects ARCH_RISCV 2019-01-24 14:21:01 +00:00