coreboot/src
QingPei Wang cc66d97f50 Add ASUS M5A88-V mainboard support
it's a AMD 880+800 mainboard. I port the code
based on the AMD reference code.
update: 1.use CIMX instead of pmio
          2.fix some whitespace
          3.fix subsystemid of devicetree.cb

Change-Id: I9725ccdbb25365c4007621318efee80b131fec29
Signed-off-by: QingPei Wang <wangqingpei@gmail.com>
Reviewed-on: http://review.coreboot.org/205
Tested-by: build bot (Jenkins)
Reviewed-by: Kerry Sheh <shekairui@gmail.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2011-10-28 22:26:07 +02:00
..
arch/x86 Get rid of the old romstage-as-bootblock ROM layout 2011-10-28 22:17:36 +02:00
boot Use ntohll where appropriate. 2011-10-21 14:14:32 +02:00
console console: support integrated 7-segment displays for POST codes 2011-10-23 17:25:04 +02:00
cpu Get rid of the old romstage-as-bootblock ROM layout 2011-10-28 22:17:36 +02:00
devices Use ntohll where appropriate. 2011-10-21 14:14:32 +02:00
drivers Add driver for ICS954309 clock generator 2011-10-25 19:22:22 +02:00
ec Lenovo H8: Fix h8_set_audio_mute() 2011-10-25 17:48:41 +02:00
include Get rid of AUTO_XIP_ROM_BASE 2011-10-28 22:17:10 +02:00
lib Clear improper use of CONFIG_CACHE_AS_RAM 2011-10-28 22:13:50 +02:00
mainboard Add ASUS M5A88-V mainboard support 2011-10-28 22:26:07 +02:00
northbridge Clear improper use of CONFIG_CACHE_AS_RAM 2011-10-28 22:13:50 +02:00
pc80 Fix checksum calculation both in romstage and ramstage. 2011-10-28 09:09:40 +02:00
southbridge Get rid of the old romstage-as-bootblock ROM layout 2011-10-28 22:17:36 +02:00
superio w83627hf: correct typo in ASL include, correct indexed registers and remove unneccesary _PR0 defs 2011-10-25 17:52:06 +02:00
vendorcode Fix AMD SB800 (cimx) southbridge code to compile with gcc 4.6 2011-10-14 22:57:11 +02:00
Kconfig refactor vesa mode setting code and bootsplash code 2011-10-13 20:00:50 +02:00
Kconfig.deprecated_options some ifdef --> if fixes 2011-04-21 20:24:43 +00:00