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Abhay Kumar cc37c85ab4 mainboard/google/reef: Configure DDI0, DDI1 HPD GPIO lines 
Configure GPIO_199 and GPIO_200 as NF2 to work as HPD.

Change-Id: If3aa6b75ed22c221cfbedaecf16035cdd9939387
Signed-off-by: Abhay Kumar <abhay.kumar@intel.com>
Reviewed-on: https://review.coreboot.org/15447
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-07-01 03:52:57 +02:00
..
acpi acpi/: add missing license header 2016-01-14 22:52:11 +01:00
arch riscv/bootblock.S: Register machine-mode, not supervisor-mode trap handler 2016-06-28 18:54:02 +02:00
commonlib region: Add writeat and eraseat support 2016-06-24 20:48:12 +02:00
console console/post: be explicit about conditional cmos_post_log() compiling 2016-05-25 18:04:11 +02:00
cpu AMD k8 fam10: Refactor S3 recovery 2016-06-29 07:33:58 +02:00
device device: i2c: Add support for I2C bus operations 2016-06-09 17:05:40 +02:00
drivers intel romstage: Use run_ramstage() 2016-06-29 07:32:43 +02:00
ec ec/google: Add support for the EC 'get time' function 2016-06-24 20:22:52 +02:00
include lib/nhlt: drop nhlt_soc_add_endpoint() 2016-06-29 23:15:37 +02:00
lib lib/nhlt: add helper functions for adding endpoints 2016-06-29 23:13:54 +02:00
mainboard mainboard/google/reef: Configure DDI0, DDI1 HPD GPIO lines 2016-07-01 03:52:57 +02:00
northbridge intel/i945: Use common ACPI S3 recovery 2016-06-26 14:03:02 +02:00
soc soc/intel/apollolake: add initial NHLT support 2016-07-01 03:21:09 +02:00
southbridge intel romstage: Use run_ramstage() 2016-06-29 07:32:43 +02:00
superio sio/winbond/w83667hg-a: Add pinmux defines for UART B 2016-05-29 19:34:54 +02:00
vendorcode vbnv: Do not initialize vbnv_copy in vbnv layer 2016-06-30 20:54:04 +02:00
Kconfig kconfig: allow various tpm type and interface permutations 2016-06-23 17:11:48 +02:00