coreboot/src/cpu/intel
Michael Niewöhner cbd4ee73d7 cpu/intel/common: correct MSR for the Nominal Performance in CPPC
The "Nominal Performance" is not the same as the "Guaranteed
Performance", but is defined as the performance a processor can deliver
continously under ideal environmental conditions.

According to edk2, this is the "Maximum Non-Turbo Ratio", which needs to
be read from MSR_PLATFORM_INFO instead of IA32_HWP_CAPABILITIES.

Correct the entry in the CPPC package.

Test: dumped SSDT from Supermicro X11SSM-F and checked decompiled
version

Change-Id: Ic2c27fd3e14af18aa4101c0acd7a5ede15d1f3a9
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46464
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-10-31 00:04:45 +00:00
..
car cpu/intel/car/romstage.c: Remove unused <bootblock_common.h> 2020-07-26 21:38:22 +00:00
common cpu/intel/common: correct MSR for the Nominal Performance in CPPC 2020-10-31 00:04:45 +00:00
fit arch/x86: Remove more romcc leftovers 2020-05-28 09:50:52 +00:00
haswell {cpu,soc}/intel: deduplicate cpu code 2020-10-24 09:46:45 +00:00
hyperthreading src/cpu: Drop unneeded empty lines 2020-09-21 16:20:30 +00:00
microcode treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
model_6bx arch/x86: Introduce ARCH_ALL_STAGES_X86_32 2020-09-26 11:42:28 +00:00
model_6ex arch/x86: Introduce ARCH_ALL_STAGES_X86_32 2020-09-26 11:42:28 +00:00
model_6fx arch/x86: Introduce ARCH_ALL_STAGES_X86_32 2020-09-26 11:42:28 +00:00
model_6xx arch/x86: Introduce ARCH_ALL_STAGES_X86_32 2020-09-26 11:42:28 +00:00
model_65x arch/x86: Introduce ARCH_ALL_STAGES_X86_32 2020-09-26 11:42:28 +00:00
model_67x arch/x86: Introduce ARCH_ALL_STAGES_X86_32 2020-09-26 11:42:28 +00:00
model_68x arch/x86: Introduce ARCH_ALL_STAGES_X86_32 2020-09-26 11:42:28 +00:00
model_106cx arch/x86: Introduce ARCH_ALL_STAGES_X86_32 2020-09-26 11:42:28 +00:00
model_206ax {cpu,soc}/intel: deduplicate cpu code 2020-10-24 09:46:45 +00:00
model_1067x arch/x86: Introduce ARCH_ALL_STAGES_X86_32 2020-09-26 11:42:28 +00:00
model_2065x {cpu,soc}/intel: deduplicate cpu code 2020-10-24 09:46:45 +00:00
model_f2x cpu/intel,soc/intel: drop Kconfig for hyperthreading 2020-10-17 22:29:44 +00:00
model_f3x cpu/intel,soc/intel: drop Kconfig for hyperthreading 2020-10-17 22:29:44 +00:00
model_f4x arch/x86: Introduce ARCH_ALL_STAGES_X86_32 2020-09-26 11:42:28 +00:00
slot_1 src/cpu: Drop unneeded empty lines 2020-09-21 16:20:30 +00:00
smm src/cpu: Drop unneeded empty lines 2020-09-21 16:20:30 +00:00
socket_441
socket_BGA956 gm45 boards: Factor out MAX_CPUS 2020-06-15 22:55:54 +00:00
socket_FCBGA559 pineview boards: Factor out MAX_CPUS 2020-06-15 22:51:35 +00:00
socket_LGA775
socket_m
socket_mPGA604
socket_p gm45 boards: Factor out MAX_CPUS 2020-06-15 22:55:54 +00:00
speedstep src/cpu: Drop unneeded empty lines 2020-09-21 16:20:30 +00:00
turbo treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
Kconfig
Makefile.inc cpu/intel/Makefile.inc: Use correct Kconfig symbols 2020-10-30 15:12:03 +00:00