coreboot/src/northbridge
Stefan Reinauer a3aa8da2ac sandy/ivybridge: use LAPIC timer in SMM
This fixes an issue with using the flash driver in SMM for writing
the event log through an SMM call.

Change-Id: If18c77634cca4563f770f09b0f0797ece24308ce
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/10762
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-07-02 08:34:40 +02:00
..
amd AMD PI agesawrapper: add PSPP (PCIe Speed Power Policy) interface 2015-06-23 01:10:52 +02:00
dmp/vortex86ex Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
intel sandy/ivybridge: use LAPIC timer in SMM 2015-07-02 08:34:40 +02:00
rdc/r8610 Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
via Remove empty lines at end of file 2015-06-08 00:55:07 +02:00