Felix Held 8f7f4bf87a soc/amd/cezanne,common: factor out CPPC code to common AMD SoC code ... The Cezanne CPPC ACPI table generation code also applies to Sabrina, so move it to the common AMD SoC code directory so that it can be used for Sabrina too. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I5ce082a27429948f8af7f55944a1062ba03155da Reviewed-on: https://review.coreboot.org/c/coreboot/+/66400 Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>		2022-08-12 21:52:12 +00:00
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amd	soc/amd/cezanne,common: factor out CPPC code to common AMD SoC code	2022-08-12 21:52:12 +00:00
cavium	soc/cavium,ti: Do resource transition	2022-06-29 11:55:01 +00:00
example/min86	src/mb: Add SPDX identifiers to files missing them	2022-08-11 17:52:19 +00:00
intel	Fix Alder Lake and Raptor Lake Device ID's	2022-08-12 17:12:12 +00:00
mediatek	soc/mediatek/mt8186: Enable USB macro control	2022-08-12 17:13:08 +00:00
nvidia	arch/arm64,arm: Prepare for !SEPARATE_ROMSTAGE	2022-07-20 20:28:39 +00:00
qualcomm	qualcomm/sc7280: Add support for edp and mdp driver	2022-08-03 03:26:13 +00:00
rockchip	soc/(amd|rockchip): Update vb2ex_hwcrypto implementations to new API req	2022-08-12 20:59:59 +00:00
samsung	soc/samsung/exynos5420: Use int instead of char for count variable	2022-07-12 22:12:19 +00:00
sifive/fu540	src/soc: Get rid of most src/soc/Kconfig files	2022-06-24 03:59:36 +00:00
ti	soc/cavium,ti: Do resource transition	2022-06-29 11:55:01 +00:00
ucb/riscv	src/soc: Get rid of most src/soc/Kconfig files	2022-06-24 03:59:36 +00:00