Michael Büchler 70fea013c7 cpu/intel/model_1067x: enable PECI ... This is required for Super I/Os to be able to read the CPU temperature through PECI. On 45nm Core 2 CPUs (Wolfdale, Yorkfield) it is not enabled by default. This is probably related to erratum AW67 "Enabling PECI via the PECI_CTL MSR incorrectly writes CPUID_FEATURE_MASK1 MSR". The suggested workaround is "Do not initialize PECI before processor update is loaded". Since coreboot performs microcode updates before running this code it should not cause any trouble. It was tested on a Core 2 Duo E8400, stepping E0. PECI is already enabled by default on older (65nm) CPUs. Tested: Pentium Dual-Core E2160. See commit edac28ce65 for the same change on cpu/intel/model_6fx. Signed-off-by: Michael Büchler <michael.buechler@posteo.net> Change-Id: I5a3ec033bd816665af4ecc82f7b167857cd7c1b6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/45184 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>		2020-09-12 10:50:33 +00:00
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amd	arch/x86: Drop CBMEM_TOP_BACKUP	2020-07-11 14:48:25 +00:00
armltd	Kconfig: comply to Linux 5.3's Kconfig language rules	2019-11-23 20:09:56 +00:00
intel	cpu/intel/model_1067x: enable PECI	2020-09-12 10:50:33 +00:00
qemu-power8	src: Remove leading blank lines from SPDX header	2020-05-18 07:00:27 +00:00
qemu-x86	mb/emulation/qemu-q35,qemu-i440fx: Add x86_64 support	2020-08-19 10:50:49 +00:00
x86	cpu/x86/smm/smmhandler: Fix x86_64 assembly exit	2020-08-30 14:48:35 +00:00
Kconfig	arch/x86: Implement RESET_VECTOR_IN_RAM	2020-04-29 05:38:00 +00:00
Makefile.inc	cpu/Makefile.inc: Clean up non-existing directory inclusion	2020-08-17 06:24:23 +00:00