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coreboot/src/device/dram/spd.c
Subrata Banik 6de8b42482 arch/x86: Refactor the SMBIOS type 17 write function 
List of changes:
1. Create Module Type macros as per Memory Type
(i.e. DDR2/DDR3/DDR4/DDR5/LPDDR4/LPDDR5) and fix compilation
issue due to renaming of existing macros due to scoping the Memory
Type.
2. Use dedicated Memory Type and Module type for `Form Factor`
and `TypeDetail` conversion using `get_spd_info()` function.
3. Create a new API (convert_form_factor_to_module_type()) for
`Form Factor` to 'Module type' conversion as per `Memory Type`.
4. Add new argument as `Memory Type` to
smbios_form_factor_to_spd_mod_type() so that it can internally
call convert_form_factor_to_module_type() for `Module Type`
conversion.
5. Update `test_smbios_form_factor_to_spd_mod_type()` to
accommodate different memory types.
6. Skip fixed module type to form factor conversion using DDR2 SPD4
specification (inside dimm_info_fill()).

Refer to datasheet SPD4.1.2.M-1 for LPDDRx and SPD4.1.2.L-3 for DDRx.

BUG=b:194659789
TEST=Refer to dmidecode -t 17 output as below:
Without this code change:

Handle 0x0012, DMI type 17, 40 bytes
Memory Device
        Array Handle: 0x000A
        Error Information Handle: Not Provided
        Total Width: 16 bits
        Data Width: 16 bits
        Size: 2048 MB
        Form Factor: Unknown
        ....

With this code change:

Handle 0x0012, DMI type 17, 40 bytes
Memory Device
        Array Handle: 0x000A
        Error Information Handle: Not Provided
        Total Width: 16 bits
        Data Width: 16 bits
        Size: 2048 MB
        Form Factor: Row Of Chips
        ....

Change-Id: Ia337ac8f50b61ae78d86a07c7a86aa9c248bad50
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56628
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jakub Czapiga <jacz@semihalf.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2021-11-11 09:10:10 +00:00

257 lines
6.3 KiB
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/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <device/dram/spd.h>
#include <spd.h>
const char *spd_manufacturer_name(const uint16_t mod_id)
{
switch (mod_id) {
case 0x9b85:
return "Crucial";
case 0x4304:
return "Ramaxel";
case 0x4f01:
return "Transcend";
case 0x9801:
return "Kingston";
case 0x987f:
case 0xad00:
return "Hynix";
case 0x9e02:
return "Corsair";
case 0xb004:
return "OCZ";
case 0xad80:
return "Hynix/Hyundai";
case 0x3486:
return "Super Talent";
case 0xcd04:
return "GSkill";
case 0xce80:
case 0xce00:
return "Samsung";
case 0xfe02:
return "Elpida";
case 0x2c80:
case 0x2c00:
return "Micron";
default:
return NULL;
}
}
static void convert_default_module_type_to_spd_info(struct spd_info *info)
{
info->form_factor = MEMORY_FORMFACTOR_UNKNOWN;
info->type_detail = MEMORY_TYPE_DETAIL_UNKNOWN;
}
static void convert_ddr2_module_type_to_spd_info(enum ddr2_module_type module_type,
struct spd_info *info)
{
switch (module_type) {
case DDR2_SPD_RDIMM:
case DDR2_SPD_MINI_RDIMM:
info->form_factor = MEMORY_FORMFACTOR_RIMM;
info->type_detail = MEMORY_TYPE_DETAIL_REGISTERED;
break;
case DDR2_SPD_UDIMM:
case DDR2_SPD_MINI_UDIMM:
info->form_factor = MEMORY_FORMFACTOR_DIMM;
info->type_detail = MEMORY_TYPE_DETAIL_UNBUFFERED;
break;
case DDR2_SPD_MICRO_DIMM:
info->form_factor = MEMORY_FORMFACTOR_DIMM;
info->type_detail = MEMORY_TYPE_DETAIL_UNKNOWN;
break;
case DDR2_SPD_SODIMM:
info->form_factor = MEMORY_FORMFACTOR_SODIMM;
info->type_detail = MEMORY_TYPE_DETAIL_UNKNOWN;
break;
default:
convert_default_module_type_to_spd_info(info);
break;
}
}
static void convert_ddr3_module_type_to_spd_info(enum ddr3_module_type module_type,
struct spd_info *info)
{
switch (module_type) {
case DDR3_SPD_RDIMM:
case DDR3_SPD_MINI_RDIMM:
info->form_factor = MEMORY_FORMFACTOR_RIMM;
info->type_detail = MEMORY_TYPE_DETAIL_REGISTERED;
break;
case DDR3_SPD_UDIMM:
case DDR3_SPD_MINI_UDIMM:
info->form_factor = MEMORY_FORMFACTOR_DIMM;
info->type_detail = MEMORY_TYPE_DETAIL_UNBUFFERED;
break;
case DDR3_SPD_MICRO_DIMM:
info->form_factor = MEMORY_FORMFACTOR_DIMM;
info->type_detail = MEMORY_TYPE_DETAIL_UNKNOWN;
break;
case DDR3_SPD_SODIMM:
case DDR3_SPD_72B_SO_UDIMM:
info->form_factor = MEMORY_FORMFACTOR_SODIMM;
info->type_detail = MEMORY_TYPE_DETAIL_UNKNOWN;
break;
default:
convert_default_module_type_to_spd_info(info);
break;
}
}
static void convert_ddr4_module_type_to_spd_info(enum ddr4_module_type module_type,
struct spd_info *info)
{
switch (module_type) {
case DDR4_SPD_RDIMM:
case DDR4_SPD_MINI_RDIMM:
info->form_factor = MEMORY_FORMFACTOR_RIMM;
info->type_detail = MEMORY_TYPE_DETAIL_REGISTERED;
break;
case DDR4_SPD_UDIMM:
case DDR4_SPD_MINI_UDIMM:
info->form_factor = MEMORY_FORMFACTOR_DIMM;
info->type_detail = MEMORY_TYPE_DETAIL_UNBUFFERED;
break;
case DDR4_SPD_SODIMM:
case DDR4_SPD_72B_SO_UDIMM:
info->form_factor = MEMORY_FORMFACTOR_SODIMM;
info->type_detail = MEMORY_TYPE_DETAIL_UNKNOWN;
break;
default:
convert_default_module_type_to_spd_info(info);
break;
}
}
static void convert_ddr5_module_type_to_spd_info(enum ddr5_module_type module_type,
struct spd_info *info)
{
switch (module_type) {
case DDR5_SPD_RDIMM:
case DDR5_SPD_MINI_RDIMM:
info->form_factor = MEMORY_FORMFACTOR_RIMM;
info->type_detail = MEMORY_TYPE_DETAIL_REGISTERED;
break;
case DDR5_SPD_UDIMM:
case DDR5_SPD_MINI_UDIMM:
info->form_factor = MEMORY_FORMFACTOR_DIMM;
info->type_detail = MEMORY_TYPE_DETAIL_UNBUFFERED;
break;
case DDR5_SPD_SODIMM:
case DDR5_SPD_72B_SO_UDIMM:
info->form_factor = MEMORY_FORMFACTOR_SODIMM;
info->type_detail = MEMORY_TYPE_DETAIL_UNKNOWN;
break;
case DDR5_SPD_2DPC:
info->form_factor = MEMORY_FORMFACTOR_PROPRIETARY_CARD;
info->type_detail = MEMORY_TYPE_DETAIL_UNKNOWN;
break;
default:
convert_default_module_type_to_spd_info(info);
break;
}
}
static void convert_lpx_module_type_to_spd_info(enum lpx_module_type module_type,
struct spd_info *info)
{
switch (module_type) {
case LPX_SPD_NONDIMM:
info->form_factor = MEMORY_FORMFACTOR_ROC;
info->type_detail = MEMORY_TYPE_DETAIL_UNKNOWN;
break;
default:
convert_default_module_type_to_spd_info(info);
break;
}
}
void get_spd_info(smbios_memory_type memory_type, uint8_t module_type, struct spd_info *info)
{
switch (memory_type) {
case MEMORY_TYPE_DDR2:
convert_ddr2_module_type_to_spd_info(module_type, info);
break;
case MEMORY_TYPE_DDR3:
convert_ddr3_module_type_to_spd_info(module_type, info);
break;
case MEMORY_TYPE_DDR4:
convert_ddr4_module_type_to_spd_info(module_type, info);
break;
case MEMORY_TYPE_DDR5:
convert_ddr5_module_type_to_spd_info(module_type, info);
break;
case MEMORY_TYPE_LPDDR3:
case MEMORY_TYPE_LPDDR4:
case MEMORY_TYPE_LPDDR5:
convert_lpx_module_type_to_spd_info(module_type, info);
break;
default:
convert_default_module_type_to_spd_info(info);
break;
}
}
static uint8_t convert_default_form_factor_to_module_type(void)
{
return SPD_UNDEFINED;
}
static uint8_t convert_ddrx_form_factor_to_module_type(smbios_memory_type memory_type,
smbios_memory_form_factor form_factor)
{
uint8_t module_type;
switch (form_factor) {
case MEMORY_FORMFACTOR_DIMM:
return DDR2_SPD_UDIMM;
case MEMORY_FORMFACTOR_RIMM:
return DDR2_SPD_RDIMM;
case MEMORY_FORMFACTOR_SODIMM:
module_type = (memory_type == MEMORY_TYPE_DDR2) ? DDR2_SPD_SODIMM
: DDR3_SPD_SODIMM;
return module_type;
default:
return convert_default_form_factor_to_module_type();
}
}
static uint8_t convert_lpx_form_factor_to_module_type(smbios_memory_form_factor form_factor)
{
switch (form_factor) {
case MEMORY_FORMFACTOR_ROC:
return LPX_SPD_NONDIMM;
default:
return convert_default_form_factor_to_module_type();
}
}
uint8_t convert_form_factor_to_module_type(smbios_memory_type memory_type,
smbios_memory_form_factor form_factor)
{
uint8_t module_type;
switch (memory_type) {
case MEMORY_TYPE_DDR2:
case MEMORY_TYPE_DDR3:
case MEMORY_TYPE_DDR4:
case MEMORY_TYPE_DDR5:
module_type = convert_ddrx_form_factor_to_module_type(memory_type, form_factor);
break;
case MEMORY_TYPE_LPDDR3:
case MEMORY_TYPE_LPDDR4:
case MEMORY_TYPE_LPDDR5:
module_type = convert_lpx_form_factor_to_module_type(form_factor);
break;
default:
module_type = convert_default_form_factor_to_module_type();
break;
}
return module_type;
}
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