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coreboot/src/cpu/intel
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Keith Hui f3ec5ed555 cpu/intel/slot_1: Increase CAR size to 8KiB 
Because cpu/intel/car/romstage.c assumes a 8KiB stack size
when setting up stack guards, and all Slot 1 compatible
CPUs have enough L1 cache available for the increase.

Adjust DCACHE_RAM_BASE to match.

Boot tested on asus/p2b-ls and asus/p3b-f using a 1400MHz
Tualeron. The latter actually requires this patch to boot
successfully.

Change-Id: I5b440e7be4f3149378db88872872012c92049c20
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/21349
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-09-12 08:07:25 +00:00
..
car cpu/intel/car/cache_as_ram.inc: Fix long standing issues 2017-09-12 07:54:59 +00:00
common cpu/intel: Wrap lines at 80 columns 2017-03-16 04:14:27 +01:00
ep80579 intel cache-as-ram: Move DCACHE_RAM_BASE 2016-12-18 20:52:01 +01:00
fit
fsp_model_206ax arch/x86: Clean up CONFIG_SMP and MAX_CPUS test 2017-08-19 15:30:51 +00:00
fsp_model_406dx arch/x86: Clean up CONFIG_SMP and MAX_CPUS test 2017-08-19 15:30:51 +00:00
haswell cpu/x86/mp_init: remove adjust_cpu_apic_entry() 2017-09-11 01:17:45 +00:00
hyperthreading cpu/intel: add IS_ENABLED() around Kconfig symbol references 2017-06-28 17:48:42 +00:00
microcode cpu/intel: Wrap lines at 80 columns 2017-03-16 04:14:27 +01:00
model_6bx src/cpu: Capitalize CPU, APIC and IOAPIC typo fix 2016-08-23 15:43:58 +02:00
model_6dx cpu/intel: Wrap lines at 80 columns 2017-03-16 04:14:27 +01:00
model_6ex Use more secure HTTPS URLs for coreboot sites 2017-06-07 12:04:50 +02:00
model_6fx cpu/intel: Wrap lines at 80 columns 2017-03-16 04:14:27 +01:00
model_6xx src/cpu: Capitalize CPU, APIC and IOAPIC typo fix 2016-08-23 15:43:58 +02:00
model_65x src/cpu: Capitalize CPU, APIC and IOAPIC typo fix 2016-08-23 15:43:58 +02:00
model_67x src/cpu: Capitalize CPU, APIC and IOAPIC typo fix 2016-08-23 15:43:58 +02:00
model_68x src/cpu: Capitalize CPU, APIC and IOAPIC typo fix 2016-08-23 15:43:58 +02:00
model_69x src/cpu/intel: Add license headers to all files 2017-02-22 22:22:59 +01:00
model_106cx cpu/intel: Wrap lines at 80 columns 2017-03-16 04:14:27 +01:00
model_206ax arch/x86: Clean up CONFIG_SMP and MAX_CPUS test 2017-08-19 15:30:51 +00:00
model_1067x cpu/intel: Wrap lines at 80 columns 2017-03-16 04:14:27 +01:00
model_2065x arch/x86: Clean up CONFIG_SMP and MAX_CPUS test 2017-08-19 15:30:51 +00:00
model_f0x src/cpu: Capitalize CPU, APIC and IOAPIC typo fix 2016-08-23 15:43:58 +02:00
model_f1x src/cpu: Capitalize CPU, APIC and IOAPIC typo fix 2016-08-23 15:43:58 +02:00
model_f2x src/cpu: Capitalize CPU, APIC and IOAPIC typo fix 2016-08-23 15:43:58 +02:00
model_f3x src/cpu: Capitalize CPU, APIC and IOAPIC typo fix 2016-08-23 15:43:58 +02:00
model_f4x src/cpu: Capitalize CPU, APIC and IOAPIC typo fix 2016-08-23 15:43:58 +02:00
slot_1 cpu/intel/slot_1: Increase CAR size to 8KiB 2017-09-12 08:07:25 +00:00
slot_2
smm/gen1 intel/smm/gen1: Backup default SMM area 2017-08-19 15:32:18 +00:00
socket_441 intel cache-as-ram: Move DCACHE_RAM_BASE 2016-12-18 20:52:01 +01:00
socket_BGA956 intel cache-as-ram: Move DCACHE_RAM_BASE 2016-12-18 20:52:01 +01:00
socket_BGA1284
socket_FC_PGA370 intel post-car: Split legacy sockets 2016-11-08 19:46:25 +01:00
socket_FCBGA559 cpu/intel/pineview: Include speedstep 2017-06-28 00:48:41 +00:00
socket_LGA771 intel cache-as-ram: Move DCACHE_RAM_BASE 2016-12-18 20:52:01 +01:00
socket_LGA775 cpu/intel/lga775: Do not select model_6ex CPU 2016-12-10 17:18:13 +01:00
socket_LGA1155 cpu/intel/model_206ax: Use tsc monotonic timer 2017-06-09 16:27:19 +02:00
socket_mFCBGA479 intel post-car: Split legacy sockets 2016-11-08 19:46:25 +01:00
socket_mFCPGA478 intel cache-as-ram: Move DCACHE_RAM_BASE 2016-12-18 20:52:01 +01:00
socket_mPGA478
socket_mPGA478MN intel cache-as-ram: Move DCACHE_RAM_BASE 2016-12-18 20:52:01 +01:00
socket_mPGA479M intel post-car: Split legacy sockets 2016-11-08 19:46:25 +01:00
socket_mPGA603
socket_mPGA604 intel cache-as-ram: Move DCACHE_RAM_BASE 2016-12-18 20:52:01 +01:00
socket_PGA370 intel post-car: Split legacy sockets 2016-11-08 19:46:25 +01:00
socket_rPGA988B
socket_rPGA989
speedstep cpu/intel: Fix the remaining issues detected by checkpatch 2017-03-16 04:26:26 +01:00
thermal_monitoring
turbo cpu/intel: add IS_ENABLED() around Kconfig symbol references 2017-06-28 17:48:42 +00:00
Kconfig cpu/intel/common: Add/Use common function to set virtualization 2016-12-27 02:30:08 +01:00
Makefile.inc cpu/intel/socket_mPGA478MN: Add socket P 2016-11-08 23:39:22 +01:00